公开(公告)号：US20100038741A1

公开(公告)日：2010-02-18

申请号：US12539037

申请日：2009-08-11

申请人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

IPC分类号： H01L31/02 ,  H01L23/48 ,  H01L21/768

CPC分类号： H01L27/14618 ,  H01L23/481 ,  H01L24/13 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a thought hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the thought hole; a first conductive layer arranged on the first insulation layer, and covering the thought hole; a second insulation layer arranged on an inner wall of the thought hole and the second surface; a second conductive layer arranged in the thought hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

摘要翻译： 半导体装置包括具有第一和第二主表面的半导体衬底和连接第一和第二主表面的思想孔; 布置在所述第一主表面上的第一绝缘层，并且具有与所述思想孔对应的开口; 布置在所述第一绝缘层上并覆盖所述思想孔的第一导电层; 布置在思想孔和第二表面的内壁上的第二绝缘层; 布置在思想孔和第二绝缘层上的第二导电层，第二导电层与第一导电层接触; 以及填充构件，其布置在所述通孔中的所述第二导电层上，并且在所述第一主表面侧上的所述第二导电层之间具有间隙。

公开(公告)号：US08426977B2

公开(公告)日：2013-04-23

申请号：US12539037

申请日：2009-08-11

申请人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

IPC分类号： H01L23/48

CPC分类号： H01L27/14618 ,  H01L23/481 ,  H01L24/13 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a through hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the through hole; a first conductive layer arranged on the first insulation layer, and covering the through hole; a second insulation layer arranged on an inner wall of the through hole and the second surface; a second conductive layer arranged in the through hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

摘要翻译： 半导体装置包括具有第一和第二主表面的半导体衬底和连接第一和第二主表面的通孔; 布置在所述第一主表面上并具有与所述通孔对应的开口的第一绝缘层; 布置在所述第一绝缘层上并覆盖所述通孔的第一导电层; 布置在所述通孔的内壁和所述第二表面上的第二绝缘层; 布置在所述通孔中和所述第二绝缘层上的第二导电层，所述第二导电层与所述第一导电层接触; 以及填充构件，其布置在所述通孔中的所述第二导电层上，并且在所述第一主表面侧上的所述第二导电层之间具有间隙。

公开(公告)号：US08421207B2

公开(公告)日：2013-04-16

申请号：US12881386

申请日：2010-09-14

申请人： Hideko Mukaida

发明人： Hideko Mukaida

IPC分类号： H01L23/492

CPC分类号： H01L23/16 ,  H01L24/14 ,  H01L27/14618 ,  H01L27/14627 ,  H01L2924/01066 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate having a first surface and a second surface at an opposite side thereof. The first surface has an active layer with a light-receiving part. The semiconductor device also includes an adhesive layer provided to surround the light-receiving part on the first surface of the semiconductor substrate; a light-transmissive protective member disposed above the light-receiving part of the semiconductor substrate with a predetermined gap and adhered via the adhesive layer; and plural external connection terminals arranged in a predetermined array on the second surface of the semiconductor substrate are included. Each center point of the external connection terminals forming two facing edges is positioned inside of an area of the adhesive layer projected on the second surface among the outermost external connection terminals.

摘要翻译： 根据一个实施例，半导体器件包括在其相对侧具有第一表面和第二表面的半导体衬底。 第一表面具有带有光接收部分的活性层。 半导体器件还包括设置成围绕半导体衬底的第一表面上的光接收部分的粘合剂层; 透光保护构件，其以预定间隙设置在所述半导体衬底的所述光接收部分的上方，并经由所述粘合剂层粘合; 并且包括在半导体衬底的第二表面上以预定阵列布置的多个外部连接端子。 形成两个相对边缘的外部连接端子的每个中心点位于在最外部的外部连接端子之间突出在第二表面上的粘合剂层的区域的内部。

公开(公告)号：US20130313588A1

公开(公告)日：2013-11-28

申请号：US13601568

申请日：2012-08-31

申请人： Akihiro KOJIMA ,  Yosuke AKIMOTO ,  Hideyuki TOMIZAWA ,  Hideko MUKAIDA ,  Miyoko SHIMADA ,  Yoshiaki SUGIZAKI ,  Hideto FURUYAMA

发明人： Akihiro KOJIMA ,  Yosuke AKIMOTO ,  Hideyuki TOMIZAWA ,  Hideko MUKAIDA ,  Miyoko SHIMADA ,  Yoshiaki SUGIZAKI ,  Hideto FURUYAMA

IPC分类号： H01L33/52

CPC分类号： H01L33/486 ,  H01L33/387 ,  H01L33/62

摘要： According to an embodiment, a semiconductor light emitting device includes a semiconductor layer having a light emitting layer. The device also includes a p-side electrode provided on a first region including the light emitting layer; an n-side electrode provided on a second region layer not including the light emitting layer; and a first insulating film having a first opening communicating with the p-side electrode and a second opening communicating with the n-side electrode. A p-side interconnection is provided on the first insulating film and electrically connected to the p-side electrode through the first opening. An n-side interconnection is provided on the first insulating film and electrically connected to the n-side electrode through the second opening. The p-side interconnection has a plurality of protrusive parts protruding toward the n-side interconnection, and the n-side interconnection has a plurality of portions extending between the protrusive parts of the p-side interconnection.

摘要翻译： 根据实施例，半导体发光器件包括具有发光层的半导体层。 该装置还包括设置在包括发光层的第一区域上的p侧电极; 设置在不包括发光层的第二区域层上的n侧电极; 以及具有与p侧电极连通的第一开口的第一绝缘膜和与n侧电极连通的第二开口。 p侧互连设置在第一绝缘膜上，并通过第一开口与p侧电极电连接。 n侧互连设置在第一绝缘膜上，并通过第二开口与n侧电极电连接。 p侧互连具有向n侧互连突出的多个突出部，并且n侧互连具有在p侧互连的突出部之间延伸的多个部分。

公开(公告)号：US20120326339A1

公开(公告)日：2012-12-27

申请号：US13421126

申请日：2012-03-15

申请人： Nobuhito SUZUYA ,  Atsushi Yoshimura ,  Hideko Mukaida

发明人： Nobuhito SUZUYA ,  Atsushi Yoshimura ,  Hideko Mukaida

IPC分类号： H01L21/56 ,  H01L23/28

CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3171 ,  H01L25/0657 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00012

摘要： According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: stacking and adhering a second semiconductor chip on a first semiconductor chip via an adhesive layer; adjusting at least one of an elasticity modulus of the adhesive layer, a sink amount of the adhesive layer, a thickness of a protective film at a surface of the first chip, and an elasticity modulus of the protective film such that “y” in a following formula is 70 or less; and sealing the chips by a molding resin with filler particles. y=74.7−82.7a1+273.2a2−9882a3+65.8a4 a1: a logarithm of the modulus of elasticity [MPa] of the adhesive layer a2: the sink amount [mm] of the adhesive layer a3: the thickness [mm] of the protective film a4: a logarithm of the modulus of elasticity [MPa] of the protective film

摘要翻译： 根据一个实施例，公开了一种半导体器件的制造方法。 该方法包括：通过粘合剂层将第二半导体芯片堆叠并粘附在第一半导体芯片上; 调整粘合剂层的弹性模量，粘合剂层的下沉量，第一芯片的表面处的保护膜的厚度和保护膜的弹性模量中的至少一个，使得下式中的y 是70以下; 并通过具有填料颗粒的模制树脂密封碎屑。 y = 74.7-82.7a1 + 273.2a2-9882a3 + 65.8a4 a1：粘合剂层的弹性模量[MPa]的对数a2：粘合剂层的吸收量[mm] a3：厚度[mm] 保护膜a4是保护膜的弹性模量[MPa]的对数

公开(公告)号：US20120001324A1

公开(公告)日：2012-01-05

申请号：US13175247

申请日：2011-07-01

申请人： Hideo AOKI ,  Hideko Mukaida ,  Masatoshi Fukuda ,  Yasuhiro Koshio ,  Hiroshi Watabe

发明人： Hideo AOKI ,  Hideko Mukaida ,  Masatoshi Fukuda ,  Yasuhiro Koshio ,  Hiroshi Watabe

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3171 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/85375 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a semiconductor device includes a circuit substrate, and first and second semiconductor chips mounted on it. The first semiconductor chip and the second semiconductor chip are flip-chip connected, and an underfill resin is filled between them. The underfill resin has a fillet portion. A thickness T1 of the first semiconductor chip and a thickness T2 of the second semiconductor chip satisfy a relationship of T1/(T1+T2)≦0.6.

摘要翻译： 在一个实施例中，半导体器件包括电路基板，以及安装在其上的第一和第二半导体芯片。 第一半导体芯片和第二半导体芯片被倒装连接，并且在它们之间填充底部填充树脂。 底部填充树脂具有圆角部分。 第一半导体芯片的厚度T1和第二半导体芯片的厚度T2满足T1 /（T1 + T2）＆nlE; 0.6的关系。

公开(公告)号：US20070222051A1

公开(公告)日：2007-09-27

申请号：US11724303

申请日：2007-03-15

申请人： Atsushi Yoshimura ,  Hideko Mukaida

发明人： Atsushi Yoshimura ,  Hideko Mukaida

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20752

摘要： A stacked semiconductor device includes a first semiconductor element bonded on a circuit base. The first semiconductor element is electrically connected to a connection part of the circuit base via a first bonding wire. A second semiconductor element is bonded on the first semiconductor element via a second adhesive layer with a thickness of 50 μm or more. The second adhesive layer is formed of an insulating resin layer whose glass transition temperature is 135° C. or higher and whose coefficient of linear expansion at a temperature equal to or lower than the glass transition temperature is 100 ppm or less.

摘要翻译： 叠层半导体器件包括接合在电路基底上的第一半导体元件。 第一半导体元件经由第一接合线电连接到电路基座的连接部。 第二半导体元件经由厚度为50μm以上的第二粘合剂层接合在第一半导体元件上。 第二粘合层由玻璃化转变温度为135℃以上的绝缘树脂层形成，玻璃化转变温度以下的温度下的线膨胀系数为100ppm以下。

公开(公告)号：US09153746B2

公开(公告)日：2015-10-06

申请号：US13601568

申请日：2012-08-31

申请人： Akihiro Kojima ,  Yosuke Akimoto ,  Hideyuki Tomizawa ,  Hideko Mukaida ,  Miyoko Shimada ,  Yoshiaki Sugizaki ,  Hideto Furuyama

发明人： Akihiro Kojima ,  Yosuke Akimoto ,  Hideyuki Tomizawa ,  Hideko Mukaida ,  Miyoko Shimada ,  Yoshiaki Sugizaki ,  Hideto Furuyama

IPC分类号： H01L33/52 ,  H01L33/00 ,  H01L33/38 ,  H01L21/50

CPC分类号： H01L33/486 ,  H01L33/387 ,  H01L33/62

摘要： According to an embodiment, a semiconductor light emitting device includes a semiconductor layer having a light emitting layer. The device also includes a p-side electrode provided on a first region including the light emitting layer; an n-side electrode provided on a second region layer not including the light emitting layer; and a first insulating film having a first opening communicating with the p-side electrode and a second opening communicating with the n-side electrode. A p-side interconnection is provided on the first insulating film and electrically connected to the p-side electrode through the first opening. An n-side interconnection is provided on the first insulating film and electrically connected to the n-side electrode through the second opening. The p-side interconnection has a plurality of protrusive parts protruding toward the n-side interconnection, and the n-side interconnection has a plurality of portions extending between the protrusive parts of the p-side interconnection.

摘要翻译： 根据实施例，半导体发光器件包括具有发光层的半导体层。 该装置还包括设置在包括发光层的第一区域上的p侧电极; 设置在不包括发光层的第二区域层上的n侧电极; 以及具有与p侧电极连通的第一开口的第一绝缘膜和与n侧电极连通的第二开口。 p侧互连设置在第一绝缘膜上，并通过第一开口与p侧电极电连接。 n侧互连设置在第一绝缘膜上，并通过第二开口与n侧电极电连接。 p侧互连具有向n侧互连突出的多个突出部，并且n侧互连具有在p侧互连的突出部之间延伸的多个部分。

公开(公告)号：US20110263076A1

公开(公告)日：2011-10-27

申请号：US13067839

申请日：2011-06-29

申请人： Atsushi Yoshimura ,  Hideko Mukaida

发明人： Atsushi Yoshimura ,  Hideko Mukaida

IPC分类号： H01L21/50

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20752

摘要： A stacked semiconductor device includes a first semiconductor element bonded on a circuit base. The first semiconductor element is electrically connected to a connection part of the circuit base via a first bonding wire. A second semiconductor element is bonded on the first semiconductor element via a second adhesive layer with a thickness of 50 μm or more. The second adhesive layer is formed of an insulating resin layer whose glass transition temperature is 135° C. or higher and whose coefficient of linear expansion at a temperature equal to or lower than the glass transition temperature is 100 ppm or less.

摘要翻译： 叠层半导体器件包括接合在电路基底上的第一半导体元件。 第一半导体元件经由第一接合线电连接到电路基座的连接部。 第二半导体元件经由厚度为50μm以上的第二粘合剂层接合在第一半导体元件上。 第二粘合层由玻璃化转变温度为135℃以上的绝缘树脂层形成，玻璃化转变温度以下的温度下的线膨胀系数为100ppm以下。

公开(公告)号：US20110073975A1

公开(公告)日：2011-03-31

申请号：US12881386

申请日：2010-09-14

申请人： Hideko Mukaida

发明人： Hideko Mukaida

IPC分类号： H01L31/0232 ,  H01L31/0203 ,  H01L31/18

CPC分类号： H01L23/16 ,  H01L24/14 ,  H01L27/14618 ,  H01L27/14627 ,  H01L2924/01066 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate having a first surface and a second surface at an opposite side thereof. The first surface has an active layer with a light-receiving part. The semiconductor device also includes an adhesive layer provided to surround the light-receiving part on the first surface of the semiconductor substrate; a light-transmissive protective member disposed above the light-receiving part of the semiconductor substrate with a predetermined gap and adhered via the adhesive layer; and plural external connection terminals arranged in a predetermined array on the second surface of the semiconductor substrate are included. Each center point of the external connection terminals forming two facing edges is positioned inside of an area of the adhesive layer projected on the second surface among the outermost external connection terminals.

摘要翻译： 根据一个实施例，半导体器件包括在其相对侧具有第一表面和第二表面的半导体衬底。 第一表面具有带有光接收部分的活性层。 半导体器件还包括设置成围绕半导体衬底的第一表面上的光接收部分的粘合剂层; 透光保护构件，其以预定间隙设置在所述半导体衬底的所述光接收部分的上方，并经由所述粘合剂层粘合; 并且包括在半导体衬底的第二表面上以预定阵列布置的多个外部连接端子。 形成两个相对边缘的外部连接端子的每个中心点位于在最外部的外部连接端子之间突出在第二表面上的粘合剂层的区域的内部。