公开(公告)号：US09466721B1

公开(公告)日：2016-10-11

申请号：US14978155

申请日：2015-12-22

Applicant: Jinbum Kim ,  Kwanheum Lee ,  Hyunjae Kang ,  Bonyoung Koo ,  Seokhoon Kim ,  Kanghun Moon ,  Jaeyoung Park ,  Byeongchan Lee ,  Sunyoung Lee ,  Choeun Lee ,  Hanki Lee ,  Sujin Jung ,  Yang Xu

Inventor： Jinbum Kim ,  Kwanheum Lee ,  Hyunjae Kang ,  Bonyoung Koo ,  Seokhoon Kim ,  Kanghun Moon ,  Jaeyoung Park ,  Byeongchan Lee ,  Sunyoung Lee ,  Choeun Lee ,  Hanki Lee ,  Sujin Jung ,  Yang Xu

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/10

CPC classification number: H01L29/785 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/1054 ,  H01L29/42364 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device may include a fin active region including a lower fin active region surrounded by a device isolation layer and an upper fin active region protruding from a top surface of the device isolation layer, a gate pattern disposed on top and side surfaces of the upper fin active region, and a source/drain region formed in the fin active region located at a side of the gate pattern. The gate pattern extends onto the device isolation region. The source/drain region includes a trench and epitaxial layers that fill the trench. Sidewalls of the trench include first sidewalls and second sidewalls that connect the first sidewalls to a bottom surface of the trench. The bottom surface of the trench is located at a lower level than the top surface of the device isolation layer beneath the gate pattern, and the second sidewalls of the trench have inclined {111} planes.

Abstract translation: 半导体器件可以包括鳍状物活性区域，其包括被器件隔离层包围的下部翅片有源区域和从器件隔离层的顶表面突出的上部翅片有源区域，设置在上部的顶部和侧面上的栅极图案 鳍状物活性区域和形成在位于栅极图案侧的鳍状物活性区域中的源极/漏极区域。 栅极图案延伸到器件隔离区域上。 源/漏区包括填充沟槽的沟槽和外延层。 沟槽的侧壁包括将第一侧壁连接到沟槽的底表面的第一侧壁和第二侧壁。 沟槽的底表面位于比栅极图案下方的器件隔离层的顶表面更低的水平处，并且沟槽的第二侧壁具有倾斜的{111}平面。

公开(公告)号：US20160284837A1

公开(公告)日：2016-09-29

申请号：US14978155

申请日：2015-12-22

Applicant: Jinbum Kim ,  Kwanheum Lee ,  Hyunjae Kang ,  Bonyoung Koo ,  Seokhoon Kim ,  Kanghun Moon ,  Jaeyoung Park ,  Byeongchan Lee ,  Sunyoung Lee ,  Choeun Lee ,  Hanki Lee ,  Sujin Jung ,  Yang Xu

Inventor： Jinbum Kim ,  Kwanheum Lee ,  Hyunjae Kang ,  Bonyoung Koo ,  Seokhoon Kim ,  Kanghun Moon ,  Jaeyoung Park ,  Byeongchan Lee ,  Sunyoung Lee ,  Choeun Lee ,  Hanki Lee ,  Sujin Jung ,  Yang Xu

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/1054 ,  H01L29/42364 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device may include a fin active region including a lower fin region surrounded by a device isolation layer and an upper fin active region protruding from a top surface of the device isolation layer, a gate pattern disposed on top and side surfaces of the upper fin active region, and a source/drain region formed in the fin active region located at a side of the gate pattern. The gate pattern extends onto the device isolation region. The source/drain region includes a trench and epitaxial layers that fill the trench. Sidewalls of the trench include first sidewalls and second sidewalls that connect the first sidewalls to a bottom surface of the trench. The bottom surface of the trench is located at a lower level than the top surface of the device isolation layer beneath the gate pattern, and the second sidewalk of the trench have inclined {111} planes.

Abstract translation: 半导体器件可以包括翅片有源区，包括由器件隔离层围绕的下鳍区域和从器件隔离层的顶表面突出的上翅片有源区，设置在上翅片的顶表面和侧表面上的栅极图案 有源区，以及形成在位于栅极图案侧的鳍状物活性区域中的源极/漏极区域。 栅极图案延伸到器件隔离区域上。 源极/漏极区域包括填充沟槽的沟槽和外延层。 沟槽的侧壁包括将第一侧壁连接到沟槽的底表面的第一侧壁和第二侧壁。 沟槽的底表面位于比栅极图案下方的器件隔离层的顶表面更低的水平处，并且沟槽的第二人行道具有倾斜的{111}平面。