公开(公告)号：US06365441B1

公开(公告)日：2002-04-02

申请号：US09694802

申请日：2000-10-23

Applicant: George F. Raiser ,  Bob Sundahl ,  Ravi Mahajan

Inventor： George F. Raiser ,  Bob Sundahl ,  Ravi Mahajan

IPC: H01L2144

CPC classification number: H01L24/31 ,  H01L21/563 ,  H01L23/3121 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/83951 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2224/05599

Abstract: An integrated circuit package that contains an underfill material between an integrated circuit and a substrate. The integrated circuit may be mounted to the substrate with solder bumps in a C4 process. The underfill material may extend from an edge of the integrated circuit a length that is no less than approximately 25% of the length between the integrated circuit edge and the integrated circuit center. It has been discovered that a length greater than approximately 25% does not provide a significant reduction in the strain of the solder bumps.

Abstract translation: 集成电路封装，其在集成电路和衬底之间包含底部填充材料。 集成电路可以通过C4工艺中的焊料凸块安装到基板上。 底部填充材料可以从集成电路的边缘延伸的长度不小于集成电路边缘和集成电路中心之间的长度的大约25％。 已经发现，大于约25％的长度不能显着降低焊料凸块的应变。

公开(公告)号：US5936304A

公开(公告)日：1999-08-10

申请号：US988506

申请日：1997-12-10

Applicant: Mirng-Ji Lii ,  George F. Raiser ,  Ravi V. Mahajan ,  Brad Menzies

Inventor： Mirng-Ji Lii ,  George F. Raiser ,  Ravi V. Mahajan ,  Brad Menzies

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/373 ,  H01L29/06 ,  H01L23/14

CPC classification number: H01L23/562 ,  H01L23/293 ,  H01L23/3736 ,  H01L23/3737 ,  H01L24/31 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3511

Abstract: According to one aspect of the invention there is provided a semiconductor chip comprising a semiconductor die, an array of electrical contacts on an integrated circuit in a frontside of the die, and a protective layer on a backside of the die.

Abstract translation: 根据本发明的一个方面，提供了一种半导体芯片，其包括半导体管芯，在管芯前侧的集成电路上的电触点阵列以及管芯背面上的保护层。

公开(公告)号：US6049124A

公开(公告)日：2000-04-11

申请号：US988231

申请日：1997-12-10

Applicant: George F. Raiser ,  Gregory Turturro

Inventor： George F. Raiser ,  Gregory Turturro

IPC: H01L21/56 ,  H01L29/06 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/32 ,  H01L21/563 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/3511

Abstract: A semiconductor package which includes a package substrate and a semiconductor chip located on the package substrate have coefficients of thermal expansion which differs by a large margin. The semiconductor chip has beveled edges and an epoxy is provided which reduce stresses on the semiconductor chip when the package is being heated.

Abstract translation: 包括封装基板和位于封装基板上的半导体芯片的半导体封装具有大幅度差异的热膨胀系数。 半导体芯片具有斜边，并且提供环氧树脂，当封装被加热时，该环氧树脂减少了半导体芯片上的应力。

公开(公告)号：US06700209B1

公开(公告)日：2004-03-02

申请号：US09474746

申请日：1999-12-29

Applicant: George F. Raiser ,  Bob Sundahl ,  Ravi Mahajan

Inventor： George F. Raiser ,  Bob Sundahl ,  Ravi Mahajan

IPC: H01L2329

CPC classification number: H01L24/31 ,  H01L21/563 ,  H01L23/3121 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/73203 ,  H01L2224/83951 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2224/05599

Abstract: An integrated circuit package that contains an underfill material between an integrated circuit and a substrate. The integrated circuit may be mounted to the substrate with solder bumps in a C4 process. The underfill material may extend from an edge of the integrated circuit a length that is no less than approximately 25% of the length between the integrated circuit edge and the integrated circuit center. It has been discovered that a length greater than approximately 25% does not provide a significant reduction in the strain of the solder bumps.

Abstract translation: 集成电路封装，其在集成电路和衬底之间包含底部填充材料。 集成电路可以通过C4工艺中的焊料凸块安装到基板上。 底部填充材料可以从集成电路的边缘延伸的长度不小于集成电路边缘和集成电路中心之间的长度的大约25％。 已经发现，大于约25％的长度不能显着降低焊料凸块的应变。