公开(公告)号：US08925741B2

公开(公告)日：2015-01-06

申请号：US13870568

申请日：2013-04-25

Applicant: Chun-Yi Chiang ,  Chun-Hsien Chiang

Inventor： Chun-Yi Chiang ,  Chun-Hsien Chiang

IPC: A47F7/08 ,  A47G25/00 ,  A47F5/08 ,  A47F5/02

CPC classification number: A47G25/005 ,  A47F5/02 ,  A47F7/08

Abstract: A shelf for boots storage includes a base, a bottom plate, at least one intermediate plate, plural connecting elements, and at least one hanging element. The bottom plate is rotatably disposed on the base. The intermediate plate is located by a side of the bottom plate opposite to the base and has a predetermined distance from the bottom plate. The connecting elements connect the intermediate plate and the bottom plate. A receiving room is defined between the connecting elements, the intermediate plate and the bottom plate. The hanging element extends from a bottom of the intermediate plate toward the receiving room, and a hanging space is defined between the hanging element and the intermediate plate.

Abstract translation: 用于靴子储存的搁架包括底座，底板，至少一个中间板，多个连接元件和至少一个悬挂元件。 底板可旋转地设置在基座上。 中间板由底板的与基座相对的一侧定位，并且与底板具有预定的距离。 连接元件连接中间板和底板。 在连接元件，中间板和底板之间限定接收室。 悬挂元件从中间板的底部朝向容纳室延伸，并且在悬挂元件和中间板之间限定悬挂空间。

公开(公告)号：US20140319085A1

公开(公告)日：2014-10-30

申请号：US13870568

申请日：2013-04-25

Applicant: Chun-Yi CHIANG ,  Chun-Hsien CHIANG

Inventor： Chun-Yi CHIANG ,  Chun-Hsien CHIANG

IPC: A47G25/00

CPC classification number: A47G25/005 ,  A47F5/02 ,  A47F7/08

Abstract: A shelf for boots storage includes a base, a bottom plate, at least one intermediate plate, plural connecting elements, and at least one hanging element. The bottom plate is rotatably disposed on the base. The intermediate plate is located by a side of the bottom plate opposite to the base and has a predetermined distance from the bottom plate. The connecting elements connect the intermediate plate and the bottom plate. A receiving room is defined between the connecting elements, the intermediate plate and the bottom plate. The hanging element extends from a bottom of the intermediate plate toward the receiving room, and a hanging space is defined between the hanging element and the intermediate plate.

Abstract translation: 用于靴子储存的搁架包括底座，底板，至少一个中间板，多个连接元件和至少一个悬挂元件。 底板可旋转地设置在基座上。 中间板由底板的与基座相对的一侧定位，并且与底板具有预定的距离。 连接元件连接中间板和底板。 在连接元件，中间板和底板之间限定接收室。 悬挂元件从中间板的底部朝向容纳室延伸，并且在悬挂元件和中间板之间限定悬挂空间。

公开(公告)号：US07989243B2

公开(公告)日：2011-08-02

申请号：US12398987

申请日：2009-03-05

Applicant: Ta-Wen Liao ,  Chen-Pang Tung ,  Chia-Ming Chang ,  Zong-Long Jhang ,  Che-Yung Lai ,  Chun-Yi Chiang ,  Chou-Huan Yu ,  Hsiang-Chih Hsiao ,  Han-Tang Chou ,  Jun-Kai Chang

Inventor： Ta-Wen Liao ,  Chen-Pang Tung ,  Chia-Ming Chang ,  Zong-Long Jhang ,  Che-Yung Lai ,  Chun-Yi Chiang ,  Chou-Huan Yu ,  Hsiang-Chih Hsiao ,  Han-Tang Chou ,  Jun-Kai Chang

IPC: H01L21/00

CPC classification number: G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/66765

Abstract: A pixel structure fabricating method is provided. A gate is formed on a substrate. A gate insulation layer covering the gate is formed on the substrate. A channel layer, a source, and a drain are simultaneously formed on the gate insulation layer above the gate. The gate, channel layer, source, and drain form a thin film transistor (TFT). A passivation layer is formed on the TFT and the gate insulation layer. A black matrix is formed on the passivation layer. The black matrix has a contact opening above the drain and a color filter containing opening. A color filer layer is formed within the color filter containing opening through inkjet printing. A dielectric layer is formed on the black matrix and the color filter layer. The dielectric layer and the passivation layer are patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.

Abstract translation: 提供像素结构制造方法。 栅极形成在基板上。 在基板上形成覆盖栅极的栅极绝缘层。 沟道层，源极和漏极同时形成在栅极上方的栅极绝缘层上。 栅极，沟道层，源极和漏极形成薄膜晶体管（TFT）。 在TFT和栅极绝缘层上形成钝化层。 在钝化层上形成黑矩阵。 黑色矩阵在漏极上方具有接触开口，并具有包含开口的滤色器。 彩色滤光片层通过喷墨印刷形成在包含滤色器的开口内。 在黑矩阵和滤色器层上形成电介质层。 将电介质层和钝化层图案化以露出漏极。 形成与漏极电连接的像素电极。

公开(公告)号：US20110053323A1

公开(公告)日：2011-03-03

申请号：US12629985

申请日：2009-12-03

Applicant: Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

Inventor： Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

IPC: H01L21/336 ,  G03F1/00

CPC classification number: H01L27/1288 ,  G03F1/00 ,  G03F1/50 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78633

Abstract: A photomask for fabricating a thin film transistor (TFT) is disclosed. The photomask includes a translucent layer disposed on a transparent substrate and covering U-shaped and rectangular channel-forming regions of the transparent substrate. First and second light-shielding layers are disposed on the translucent layer and located at the outer and inner sides of the U-shaped channel-forming region, respectively, and third and fourth light-shielding layers are disposed on the translucent layer and located at opposite sides of the rectangular channel-forming region, respectively, to serve as source/drain-forming regions. An end of the third light-shielding layer extends to the first light-shielding layer. A plurality of first light-shielding islands is disposed on the translucent layer and located within the rectangular channel-forming region. A method for fabricating source/drain electrodes of a TFT is also disclosed.

Abstract translation: 公开了一种用于制造薄膜晶体管（TFT）的光掩模。 光掩模包括设置在透明基板上并覆盖透明基板的U形和矩形沟道形成区域的半透明层。 第一和第二遮光层分别设置在透光层上，分别位于U形沟道形成区的外侧和内侧，第三和第四遮光层设置在半透明层上并位于 分别作为源极/漏极形成区域的矩形沟道形成区域的相对侧。 第三遮光层的一端延伸到第一遮光层。 多个第一遮光岛设置在透光层上并且位于矩形通道形成区域内。 还公开了一种用于制造TFT的源极/漏极的方法。

公开(公告)号：US07645649B1

公开(公告)日：2010-01-12

申请号：US12242938

申请日：2008-10-01

Applicant: Che-Yung Lai ,  Zong-Long Jhang ,  Chia-Chi Tsai ,  Chen-Pang Tung ,  Chia-Ming Chang ,  Chun-Yi Chiang ,  Chou-Huan Yu ,  Hsiang-Chih Hsiao ,  Han-Tang Chou ,  Jun-Kai Chang ,  Ta-Wen Liao

Inventor： Che-Yung Lai ,  Zong-Long Jhang ,  Chia-Chi Tsai ,  Chen-Pang Tung ,  Chia-Ming Chang ,  Chun-Yi Chiang ,  Chou-Huan Yu ,  Hsiang-Chih Hsiao ,  Han-Tang Chou ,  Jun-Kai Chang ,  Ta-Wen Liao

IPC: H01L21/00

CPC classification number: H01L27/1248 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/1214 ,  H01L27/1288

Abstract: A pixel structure fabricating method is provided. A gate and a gate insulation layer covering the gate are formed on a substrate. A channel layer is formed on the gate insulation layer. A conductive layer is formed on the channel layer and gate insulation layer. A black matrix having a color filer layer accommodating opening is formed on the conductive layer. The black matrix includes a first block and a second block which is thicker than the first block. The conductive layer is patterned with the black matrix as a mask to form a source and a drain on the channel layer. A color filter layer is formed within the color filter layer accommodating opening through inkjet printing. A dielectric layer is formed on the black matrix and color filter layer. The dielectric layer is patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.

Abstract translation: 提供像素结构制造方法。 在基板上形成覆盖栅极的栅极和栅极绝缘层。 沟道层形成在栅绝缘层上。 在沟道层和栅极绝缘层上形成导电层。 在导电层上形成具有彩色滤光层容纳开口的黑色矩阵。 黑矩阵包括比第一块更厚的第一块和第二块。 将导电层图案化为黑矩阵作为掩模，以在沟道层上形成源极和漏极。 滤色器层通过喷墨印刷形成在滤色器层容纳开口内。 在黑矩阵和滤色器层上形成电介质层。 图案化电介质层以露出漏极。 形成与漏极电连接的像素电极。

公开(公告)号：US07598102B1

公开(公告)日：2009-10-06

申请号：US12183071

申请日：2008-07-31

Applicant: Chou-Huan Yu ,  Chun-Yi Chiang ,  Chia-Chi Tsai ,  Chen-Pang Tung ,  Hsiang-Chih Hsiao ,  Chia-Ming Chang ,  Zong-Long Jhang ,  Che-Yung Lai ,  Han-Tang Chou ,  Jun-Kai Chang ,  Ta-Wen Liao

Inventor： Chou-Huan Yu ,  Chun-Yi Chiang ,  Chia-Chi Tsai ,  Chen-Pang Tung ,  Hsiang-Chih Hsiao ,  Chia-Ming Chang ,  Zong-Long Jhang ,  Che-Yung Lai ,  Han-Tang Chou ,  Jun-Kai Chang ,  Ta-Wen Liao

IPC: H01L21/00

CPC classification number: G02F1/136209 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/41733

Abstract: A fabricating method for a pixel structure including following procedures is provided. First, a gate and a gate insulator layer are formed sequentially on a substrate. Next, a semiconductor layer, a conductive layer and a photosensitive black matrix having a color filter containing opening are sequentially formed on the gate insulator layer. The photosensitive black matrix includes a first portion and a second portion. A thickness of the first portion is smaller than that of the second portion. A channel, a source and a drain are formed simultaneously using the photosensitive black matrix as a mask. A passivation is formed on the substrate, and a color filer layer is formed within the color filter containing opening via an inkjet printing process and a dielectric layer is formed thereon. Next, a patterning process is applied to expose the drain. Ultimately, a pixel electrode connected to the drain is formed.

Abstract translation: 提供了一种包括以下步骤的像素结构的制造方法。 首先，在基板上依次形成栅极和栅极绝缘体层。 接下来，在栅极绝缘体层上依次形成具有滤色器的开口的半导体层，导电层和感光黑矩阵。 感光黑矩阵包括第一部分和第二部分。 第一部分的厚度小于第二部分的厚度。 使用感光黑矩阵作为掩模，同时形成通道，源极和漏极。 在基板上形成钝化，并通过喷墨印刷工艺在滤色器容纳孔内形成彩色滤光层，并在其上形成电介质层。 接下来，施加图案化处理以暴露漏极。 最终，形成连接到漏极的像素电极。

公开(公告)号：US20120270397A1

公开(公告)日：2012-10-25

申请号：US13415478

申请日：2012-03-08

Applicant: Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

Inventor： Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

IPC: H01L21/308

CPC classification number: H01L27/1288 ,  G03F1/00 ,  G03F1/50 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78633

Abstract: A method is provided for fabricating source/drain electrodes of a thin film transistor. The method generally provides a substrate having a first gate electrode and a second gate electrode adjacent and electrically connected. The method further provides coating a photoresist layer on the metal layer, and performing an exposure process on the photoresist layer by a photomask. The method further performs a development process on the exposed photoresist layer to form a photoresist pattern layer with different thicknesses on the metal layer, and then etches the metal layer using the photoresist pattern layer as an etch mask, to form a pair of first source/drain electrodes on the first gate electrode and a pair of second source/drain electrodes on the second gate electrode.

Abstract translation: 提供了一种用于制造薄膜晶体管的源/漏电极的方法。 该方法通常提供具有邻近并电连接的第一栅电极和第二栅电极的衬底。 该方法还提供在金属层上涂覆光致抗蚀剂层，并通过光掩模对光致抗蚀剂层进行曝光处理。 该方法进一步对曝光的光致抗蚀剂层进行显影处理，以在金属层上形成具有不同厚度的光致抗蚀剂图案层，然后使用光致抗蚀剂图案层作为蚀刻掩模蚀刻金属层，以形成一对第一源/ 第一栅电极上的漏电极和第二栅电极上的一对第二源/漏电极。

公开(公告)号：US08153337B2

公开(公告)日：2012-04-10

申请号：US12629985

申请日：2009-12-03

Applicant: Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

Inventor： Zong-Long Jhang ,  Chia-Ming Chang ,  Hsiang-Chih Hsiao ,  Chun-Yi Chiang ,  Che-Yung Lai ,  Chou-Huan Yu ,  Ta-Wen Liao

IPC: G03F1/00 ,  G03F7/00

CPC classification number: H01L27/1288 ,  G03F1/00 ,  G03F1/50 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/78633

Abstract: A photomask for fabricating a thin film transistor (TFT) is disclosed. The photomask includes a translucent layer disposed on a transparent substrate and covering U-shaped and rectangular channel-forming regions of the transparent substrate. First and second light-shielding layers are disposed on the translucent layer and located at the outer and inner sides of the U-shaped channel-forming region, respectively, and third and fourth light-shielding layers are disposed on the translucent layer and located at opposite sides of the rectangular channel-forming region, respectively, to serve as source/drain-forming regions. An end of the third light-shielding layer extends to the first light-shielding layer. A plurality of first light-shielding islands is disposed on the translucent layer and located within the rectangular channel-forming region. A method for fabricating source/drain electrodes of a TFT is also disclosed.

Abstract translation: 公开了用于制造薄膜晶体管（TFT）的光掩模。 光掩模包括设置在透明基板上并覆盖透明基板的U形和矩形沟道形成区域的半透明层。 第一和第二遮光层分别设置在透光层上，分别位于U形沟道形成区的外侧和内侧，第三和第四遮光层设置在半透明层上并位于 分别作为源极/漏极形成区域的矩形沟道形成区域的相对侧。 第三遮光层的一端延伸到第一遮光层。 多个第一遮光岛设置在透光层上并且位于矩形通道形成区域内。 还公开了一种用于制造TFT的源极/漏极的方法。

公开(公告)号：US09962017B2

公开(公告)日：2018-05-08

申请号：US15098016

申请日：2016-04-13

Applicant: Chun-Yi Chiang ,  Chun-Hsien Chiang

Inventor： Chun-Yi Chiang ,  Chun-Hsien Chiang

IPC: A47F7/08 ,  A47F5/10 ,  F16B2/06

CPC classification number: A47F7/08 ,  A47B87/0223 ,  A47F5/10 ,  F16B2/065

Abstract: An adjustable shoe rack includes a support structure, at least one shoes plate, and at least one holding structure. The shoes plate is disposed on the support structure and is at a predetermined distance from a ground. The holding structure is disposed on a bottom face of the shoes plate and includes two clamping structures and a moving structure. The two clamping structures are parallel arranged. Each clamping structure includes a fixed clamping element and a movable clamping element wherein a clamping space is defined therebetween for receiving shoes. The two movable clamping elements are located between the two fixed clamping elements. The moving structure is located between the two movable clamping elements and is able to drive the two movable clamping elements to move toward opposite directions at the same time so as to alternate a width of the clamping space.

公开(公告)号：US20170295959A1

公开(公告)日：2017-10-19

申请号：US15098016

申请日：2016-04-13

Applicant: Chun-Yi Chiang ,  Chun-Hsien Chiang

Inventor： Chun-Yi Chiang ,  Chun-Hsien Chiang

IPC: A47F7/08 ,  F16B2/06 ,  A47F5/10

CPC classification number: A47F7/08 ,  A47B87/0223 ,  A47F5/10 ,  F16B2/065

Abstract: An adjustable shoe rack includes a support structure, at least one shoes plate, and at least one holding structure. The shoes plate is disposed on the support structure and is at a predetermined distance from a ground. The holding structure is disposed on a bottom face of the shoes plate and includes two clamping structures and a moving structure. The two clamping structures are parallel arranged. Each clamping structure includes a fixed clamping element and a movable clamping element wherein a clamping space is defined therebetween for receiving shoes. The two movable clamping elements are located between the two fixed clamping elements. The moving structure is located between the two movable clamping elements and is able to drive the two movable clamping elements to move toward opposite directions at the same time so as to alternate a width of the clamping space.