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    ROM FOR CONSTRAINING 2nd-BIT EFFECT
    1.
    发明申请
    ROM FOR CONSTRAINING 2nd-BIT EFFECT 有权
    用于约束第二位影响的ROM

    公开(公告)号：US20130240975A1

    公开(公告)日：2013-09-19

    申请号：US13421389

    申请日：2012-03-15

    申请人： Chih-Chieh Cheng ,  Cheng-Hsien Cheng ,  Wen-Jer Tsai

    发明人： Chih-Chieh Cheng ,  Cheng-Hsien Cheng ,  Wen-Jer Tsai

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  G11C11/5621 ,  G11C16/0466 ,  H01L27/11521 ,  H01L27/11568

    摘要： A read only memory including a substrate, a source region and a drain region, a charge storage structure, a gate, and a local extreme doping region is provided. The source region and the drain region are disposed in the substrate, the charge storage structure is located on the substrate between the source region and the drain region, and the gate is configured on the charge storage structure. The local extreme doping region is located in the substrate between the source region and the drain region and includes a low doping concentration region and at least one high doping concentration region. The high doping concentration region is disposed between the low doping concentration region and one of the source region and the drain region, and a doping concentration of the high doping concentration region is three times or more than three times a doping concentration of the low doping concentration region.

    摘要翻译： 提供了包括基板，源极区和漏极区，电荷存储结构，栅极和局部极化掺杂区域的只读存储器。 源极区域和漏极区域设置在衬底中，电荷存储结构位于源极区域和漏极区域之间的衬底上，并且栅极被配置在电荷存储结构上。 局部极掺杂区位于源区和漏区之间的衬底中，并且包括低掺杂浓度区和至少一个高掺杂浓度区。 高掺杂浓度区域设置在低掺杂浓度区域和源极区域和漏极区域之一中，并且高掺杂浓度区域的掺杂浓度是低掺杂浓度的掺杂浓度的三倍或更多倍 地区。

    Multi level programmable memory structure with multiple charge storage structures and fabricating method thereof
    3.
    发明授权
    Multi level programmable memory structure with multiple charge storage structures and fabricating method thereof 有权
    具有多个电荷存储结构的多级可编程存储器结构及其制造方法

    公开(公告)号：US08796754B2

    公开(公告)日：2014-08-05

    申请号：US13166144

    申请日：2011-06-22

    申请人： Cheng-Hsien Cheng ,  Wen-Jer Tsai ,  Shih-Guei Yan ,  Chih-Chieh Cheng ,  Jyun-Siang Huang

    发明人： Cheng-Hsien Cheng ,  Wen-Jer Tsai ,  Shih-Guei Yan ,  Chih-Chieh Cheng ,  Jyun-Siang Huang

    IPC分类号： H01L29/792 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788

    CPC分类号： H01L29/7887 ,  H01L21/28273 ,  H01L27/11551 ,  H01L27/11578 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/792 ,  H01L29/7923

    摘要： A memory structure including a memory cell is provided, and the memory cell includes following elements. A first gate is disposed on a substrate. A stacked structure includes a first dielectric structure, a channel layer, a second dielectric structure and a second gate disposed on the first gate, a first charge storage structure disposed in the first dielectric structure and a second charge storage structure disposed in the second dielectric structure. At least one of the first charge storage structure and the second charge storage structure includes two charge storage units which are physically separated. A first dielectric layer is disposed on the first gate at two sides of the stacked structure. A first source and drain and a second source and drain are disposed on the first dielectric layer and located at two sides of the channel layer.

    摘要翻译： 提供包括存储单元的存储器结构，并且存储单元包括以下元件。 第一栅极设置在基板上。 层叠结构包括第一电介质结构，沟道层，第二电介质结构和设置在第一栅极上的第二栅极，设置在第一介电结构中的第一电荷存储结构和设置在第二电介质结构中的第二电荷存储结构 。 第一电荷存储结构和第二电荷存储结构中的至少一个包括物理分离的两个电荷存储单元。 第一电介质层在堆叠结构的两侧设置在第一栅极上。 第一源极和漏极以及第二源极和漏极设置在第一介电层上并位于沟道层的两侧。

    MEMORY CELL AND MANUFACTURING METHOD THEREOF AND MEMORY STRUCTURE
    5.
    发明申请
    MEMORY CELL AND MANUFACTURING METHOD THEREOF AND MEMORY STRUCTURE 审中-公开
    存储单元及其制造方法和存储器结构

    公开(公告)号：US20110079840A1

    公开(公告)日：2011-04-07

    申请号：US12571692

    申请日：2009-10-01

    申请人： Jyun-Siang Huang ,  Wen-Jer Tsai ,  Tien-Fan Ou ,  Cheng-Hsien Cheng

    发明人： Jyun-Siang Huang ,  Wen-Jer Tsai ,  Tien-Fan Ou ,  Cheng-Hsien Cheng

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L29/4983 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11578 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923

    摘要： A memory cell is provided. The memory cell includes a substrate, an isolation layer, a gate, a charge storage structure, a first source/drain region, a second source/drain region and a channel layer. The isolation layer is disposed over the substrate. The gate is disposed over the isolation layer. The charge storage structure is disposed over the isolation layer and the gate. The first source/drain region is disposed over the charge storage structure at two sides of the gate. The second source/drain region is disposed over the charge storage structure at top of the gate. The channel layer is disposed over the charge storage structure at sidewall of the gate and is electrically connected with the first source/drain region and the second source/drain region.

    摘要翻译： 提供存储单元。 存储单元包括衬底，隔离层，栅极，电荷存储结构，第一源极/漏极区，第二源极/漏极区和沟道层。 隔离层设置在衬底上。 栅极设置在隔离层上。 电荷存储结构设置在隔离层和栅极上。 第一源极/漏极区域设置在栅极两侧的电荷存储结构之上。 第二源极/漏极区域设置在栅极顶部的电荷存储结构的上方。 沟道层设置在栅极侧壁上的电荷存储结构上，并与第一源/漏区和第二源极/漏极区电连接。

    MEMORY STRUCTURE AND FABRICATING METHOD THEREOF
    8.
    发明申请
    MEMORY STRUCTURE AND FABRICATING METHOD THEREOF 有权
    记忆结构及其制作方法

    公开(公告)号：US20120326222A1

    公开(公告)日：2012-12-27

    申请号：US13166144

    申请日：2011-06-22

    申请人： Cheng-Hsien Cheng ,  Wen-Jer Tsai ,  Shih-Guei Yan ,  Chih-Chieh Cheng ,  Jyun-Siang Huang

    发明人： Cheng-Hsien Cheng ,  Wen-Jer Tsai ,  Shih-Guei Yan ,  Chih-Chieh Cheng ,  Jyun-Siang Huang

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L29/7887 ,  H01L21/28273 ,  H01L27/11551 ,  H01L27/11578 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/792 ,  H01L29/7923

    摘要： A memory structure including a memory cell is provided, and the memory cell includes following elements. A first gate is disposed on a substrate. A stacked structure includes a first dielectric structure, a channel layer, a second dielectric structure and a second gate disposed on the first gate, a first charge storage structure disposed in the first dielectric structure and a second charge storage structure disposed in the second dielectric structure. At least one of the first charge storage structure and the second charge storage structure includes two charge storage units which are physically separated. A first dielectric layer is disposed on the first gate at two sides of the stacked structure. A first source and drain and a second source and drain are disposed on the first dielectric layer and located at two sides of the channel layer.

    摘要翻译： 提供包括存储单元的存储器结构，并且存储单元包括以下元件。 第一栅极设置在基板上。 层叠结构包括第一电介质结构，沟道层，第二电介质结构和设置在第一栅极上的第二栅极，设置在第一介电结构中的第一电荷存储结构和设置在第二电介质结构中的第二电荷存储结构 。 第一电荷存储结构和第二电荷存储结构中的至少一个包括物理分离的两个电荷存储单元。 第一电介质层在堆叠结构的两侧设置在第一栅极上。 第一源极和漏极以及第二源极和漏极设置在第一介电层上并位于沟道层的两侧。

    Golf club body made of composite material and having a bent front section
    9.
    发明授权
    Golf club body made of composite material and having a bent front section 失效
    由复合材料制成并具有弯曲的前部的高尔夫球杆体

    公开(公告)号：US5465959A

    公开(公告)日：1995-11-14

    申请号：US357311

    申请日：1994-12-16

    申请人： Cheng-Hsien Cheng

    发明人： Cheng-Hsien Cheng

    IPC分类号： A63B53/02 ,  A63B53/10

    CPC分类号： A63B53/10 ,  A63B2053/021 ,  A63B2209/02 ,  A63B60/34 ,  Y10S273/08

    摘要： Disclosed is a golf club body made of composite material and having a bent front section, consisting generally of a straight, tapered hollow body made of carbon fiber, a bent section connected to a tapered front end of the straight body and being formed of a carbon fiber outer wall and core retained therewithin, and a link connecting the body and bent sections. The bent section has a recess of sufficient depth circumferentially formed in an inner wall of one end having substantially the same diameter as that of the tapered end of the straight body section, such that the link is permitted to be fixedly engaged within the bent section recess at one end and within the tapered end of the body at the other end, to thereby firmly connect the bent section to the straight hollow body section.

    摘要翻译： 公开了一种由复合材料制成的高尔夫球杆体，其具有弯曲的前部，其总体由碳纤维制成的直的锥形中空体组成，弯曲部分连接到直体的锥形前端并由碳形成 纤维外壁和芯保持在其中，以及连接主体和弯曲部分的连杆。 弯曲部分具有圆周形成在一端的内壁中的足够深度的凹部，其具有与直体部分的锥形端部的直径基本相同的直径，使得连杆被允许固定地接合在弯曲部分凹部内 在另一端处的本体的一端和锥形端部内，从而将弯曲部分牢固地连接到直的中空主体部分。

    ROM for constraining 2nd-bit effect
    10.
    发明授权
    ROM for constraining 2nd-bit effect 有权
    ROM限制第二位效果

    公开(公告)号：US09209316B2

    公开(公告)日：2015-12-08

    申请号：US13421389

    申请日：2012-03-15

    申请人： Chih-Chieh Cheng ,  Cheng-Hsien Cheng ,  Wen-Jer Tsai

    发明人： Chih-Chieh Cheng ,  Cheng-Hsien Cheng ,  Wen-Jer Tsai

    IPC分类号： H01L27/115 ,  H01L29/792 ,  G11C11/56 ,  G11C16/04

    CPC分类号： H01L29/792 ,  G11C11/5621 ,  G11C16/0466 ,  H01L27/11521 ,  H01L27/11568

    摘要： A read only memory including a substrate, a source region and a drain region, a charge storage structure, a gate, and a local extreme doping region is provided. The source region and the drain region are disposed in the substrate, the charge storage structure is located on the substrate between the source region and the drain region, and the gate is configured on the charge storage structure. The local extreme doping region is located in the substrate between the source region and the drain region and includes a low doping concentration region and at least one high doping concentration region. The high doping concentration region is disposed between the low doping concentration region and one of the source region and the drain region, and a doping concentration of the high doping concentration region is three times or more than three times a doping concentration of the low doping concentration region.

    摘要翻译： 提供了包括基板，源极区和漏极区，电荷存储结构，栅极和局部极化掺杂区域的只读存储器。 源极区域和漏极区域设置在衬底中，电荷存储结构位于源极区域和漏极区域之间的衬底上，并且栅极被配置在电荷存储结构上。 局部极掺杂区位于源区和漏区之间的衬底中，并且包括低掺杂浓度区和至少一个高掺杂浓度区。 高掺杂浓度区域设置在低掺杂浓度区域和源极区域和漏极区域之一中，并且高掺杂浓度区域的掺杂浓度是低掺杂浓度的掺杂浓度的三倍或更多倍 地区。