摘要:
A hardware implementation method for concurrently realizing overlap filter and core transform and an operation method thereof are provided. The overlap filter and core transform can be adjusted according to different specifications, processes, and operation frequencies. The hardware implementation method and the operation method thereof adopt a transform-level hardware sharing architecture and multi-port input/output register array, thereby efficiently realizing overlap filter and core transform.
摘要:
A method and an apparatus for cost calculation in decimal motion estimation are provided. The method comprises the following steps. Firstly, perform interpolation on a current block to get an interpolation result of a position corresponding to a decimal motion vector. Secondly, calculate a cost according to data at integer point positions of a reference frame corresponding to the current block and the decimal motion vector, and according to the interpolation result.
摘要:
A method for motion estimation and the apparatus thereof are provided. The method for motion estimation uses multi-resolution hierarchial search and allows splitting the optimal block mode at the level of the lowest resolution. The method also allows further splitting of blocks during local refinement at levels of higher resolutions.
摘要:
A data reuse method with level C+ for block matching motion estimation is disclosed. Compared to conventional Level C scheme, this invention can save large external memory bandwidth of motion estimation. The main idea is to reuse the overlapped searching region in the horizontal direction and partially reuse the overlapped searching region in the vertical direction. Several vertical successive current macroblocks are stitched, and the searching region of these current macroblocks is loaded, simultaneously. With the small overhead of internal memory, the reduction of external memory bandwidth is large. By case studies of H.264/AVC, the level C+ scheme can provide a good trade-off between the conventional Level C and D scheme.
摘要:
An entropy decoding circuit, an entropy decoding method, and an entropy decoding method using a pipeline manner are provided. The entropy decoding circuit includes a coefficient register unit, a first entropy decoder, a read/write control circuit, and a second entropy decoder. The first entropy decoder reads a first stream to be decoded to perform a first entropy decoding process thereupon and writes it to the coefficient register unit in an adaptive scan order through the read/write control circuit. The second entropy decoder reads a second stream to be decoded and performs a decoding process thereupon according to a normalization parameter and whether a normalized coefficient is zero or not. Meanwhile, the normalized coefficient in the coefficient register unit is read out in a fixed scan order through the read/write control circuit to complete the decoding process.
摘要:
The exemplary embodiments of the present invention are direct to a method for generating a resampling reference picture and an apparatus and video decoding system using this method. The video image decoding system is used to decode a bit stream, so as to obtain a current frame. The method for generating a resampling reference picture includes following steps: (a) looking ahead specific information of next x frames of the current frame in the bit stream; (b) determining whether to generate a resampling reference picture according to the specific information of the next x frames.
摘要:
An adaptive canonical Huffman decoder including a symbol index generator, a content selector, and a symbol table buffer circuit is illustrated. The content selector outputs a content selection signal. The symbol table buffer circuit reads a corresponding symbol table from a plurality of symbol tables stored in an external memory according to the content selection signal and stores the corresponding symbol table. The symbol index generator stores decoding information of a plurality of encoding tables and selects a corresponding decoding information among all the decoding information according to the content selection signal. Then, the symbol index generator receives a bit stream and decodes the bit stream according to the corresponding decoding information to obtain a symbol index. After that, the symbol table buffer circuit obtains an output symbol from the corresponding symbol table according to the symbol index.
摘要:
An intra prediction mode selecting method is disclosed. First, a compress profile and a frame resolution of a frame data are received. Next, a plurality of corresponding prediction modes are selected according to the compress profile and the frame resolution, and the selected prediction modes are scheduled for sequentially calculating a plurality of corresponding cost functions. Finally, the cost functions are compared to select one of the prediction modes to serve as a prediction mode of the frame data.
摘要:
The exemplary embodiments of the present invention are direct to a method for generating a resampling reference picture and an apparatus and video decoding system using this method. The video image decoding system is used to decode a bit stream, so as to obtain a current frame. The method for generating a resampling reference picture includes following steps: (a) looking ahead specific information of next x frames of the current frame in the bit stream; (b) determining whether to generate a resampling reference picture according to the specific information of the next x frames.
摘要:
A method and an apparatus for generating a coded block pattern for highpass coefficients are provided. The method includes receiving a quantized highpass coefficient (HP), wherein the HP includes a macroblock data; dividing the macroblock into a plurality of blocks; performing lapped transform (LT) operations of two stages on the said block data, concurrently calculating a plurality of coded block patterns of the blocks corresponding to all possible HP prediction directions; performing a calculation to obtain selection information of the HP prediction directions according to lowpass coefficients (LPs) generated through LT operations of the two stages; selecting a corresponding coded block pattern among the said coded block patterns according to the above-mentioned selection information of the HP prediction directions and outputting the selected coded block pattern.