公开(公告)号：US20080285319A1

公开(公告)日：2008-11-20

申请号：US11804599

申请日：2007-05-18

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H02M3/335

CPC分类号： H02M3/33507

摘要： Common household power transformers (e.g., “wall warts”) typically exhibit poor power factors, which, in turn, cause energy losses to power grids and adversely affect current waveforms in the power grids. AC-to-DC power conversion with good power factor is achieved using a transformer, power switch coupled in series with the primary side of the transformer, and switching controller. The switching controller measures current through the primary side of the transformer, via a current sense element, and controls the power switch to enable and disable current through the primary side of the transformer. The switching controller generates a power switch control signal at a frequency with a duty factor that changes non-linearly as a function of an instantaneous current through the primary side of the transformer. As a result, a power factor of greater than 90% or even 95% can be achieved.

摘要翻译： 通常的家庭电力变压器（例如，“壁疣”）通常表现出较差的功率因数，这又导致电力网的能量损耗并且不利地影响电网中的电流波形。 使用变压器，与变压器的初级侧串联的功率开关和开关控制器实现具有良好功率因数的AC至DC功率转换。 开关控制器通过电流检测元件测量变压器初级侧的电流，并控制电源开关以使能和禁止通过变压器初级侧的电流。 开关控制器以具有随着通过变压器的初级侧的瞬时电流的函数而非线性地改变的占空比的频率产生功率开关控制信号。 结果，可以实现大于90％或甚至95％的功率因数。

公开(公告)号：US6072340A

公开(公告)日：2000-06-06

申请号：US823189

申请日：1997-03-24

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H03K5/04 ,  H03M1/82 ,  H04L25/03 ,  H03M1/76 ,  H03K5/00

CPC分类号： H04L25/03834 ,  H03K5/04 ,  H03M1/822

摘要： A signal shaping circuit for shaping amplitude shift keyed digital pulses of a digital data stream is set forth. The digital data stream is comprised of a plurality of symbols from which the signal shaping circuit generates an output signal having sinusoidally shaped transition regions between logic level transitions of the digital data stream. The signal shaping circuit comprises an input lead receiving each of the digital pulses of the digital data stream. A delay circuit receives each of the digital pulses of the digital data stream at the input lead and, after a predefined time delay, outputs delayed digital pulses corresponding to each of the digital pulses received at the input lead. A ringing filter circuit having a linear response receives each of the digital pulses of the digital data stream provided from the input lead and each of the digital pulses provided at the output of the delay circuit. The ringing filter circuit has a ringing period about equal to or less than twice the symbol period of the digital data stream which, in turn, sets the value of the predefined delay. More particularly, the predefined delay of the delay circuit is about equal to half of the ringing period. As a result, the ringing filter circuit generates an output amplitude shift keyed digital data stream directly corresponding to the digital data stream provided at the input lead which has sinusoidally shaped transition regions between its logic level transitions. The resulting waveform has a lower bandwidth than the corresponding input signal and, further, has no intersymbol interference associated with it.

摘要翻译： 阐述了一种用于整形数字数据流的幅移键控数字脉冲的信号整形电路。 数字数据流由多个符号组成，信号整形电路从该符号生成在数字数据流的逻辑电平转换之间具有正弦形状的过渡区域的输出信号。 信号整形电路包括接收数字数据流的每个数字脉冲的输入引线。 延迟电路在输入引线处接收数字数据流的每个数字脉冲，并且在预定义的时间延迟之后输出对应于在输入引线处接收的每个数字脉冲的延迟的数字脉冲。 具有线性响应的振铃滤波器电路接收从输入引线提供的数字数据流的每个数字脉冲和设置在延迟电路的输出端的每个数字脉冲。 振铃滤波器电路具有大约等于或小于数字数据流的符号周期的两倍的振铃周期，其又设置预定义延迟的值。 更具体地，延迟电路的预定延迟大约等于振铃周期的一半。 结果，振铃滤波器电路产生直接对应于在输入引线处提供的数字数据流的输出振幅移位键控数字数据流，其在其逻辑电平转换之间具有正弦形状的过渡区域。 所得到的波形具有比对应的输入信号更低的带宽，并且还没有与其相关联的符号间干扰。

公开(公告)号：US4148097A

公开(公告)日：1979-04-03

申请号：US812318

申请日：1977-07-01

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H02M3/337 ,  H02M3/335 ,  H02M7/537

CPC分类号： H02M3/3378

摘要： A DC to DC converter is disclosed wherein the output voltage is regulated by the control of current pulses in an inverter stage. The converter output voltage and a defined reference voltage are compared to generate error signals and current flow in the inverter stage is monitored to generate proportional current signals. The error signals are directly compared to the current signals by a comparing circuit which comprises a voltage ampliflier and a current source. The error signals are coupled to the voltage amplifier which maintains a corresponding voltage on one side of a resistor. The current signals are coupled to the current source which is connected to the other side of the resistor and maintains the current flow through the resistor at a level equal to the current signals. Current pulses in the inverter stage are initiated by pulses from a pulse generator circuit and terminated when the current signals exceed a current threshold level which is defined as the voltage maintained on the resistor divided by the resistance value of the resistor.

摘要翻译： 公开了一种DC-DC转换器，其中通过控制逆变器级中的电流脉冲来调节输出电压。 将转换器输出电压和定义的参考电压进行比较以产生误差信号，并监视逆变器级中的电流以产生比例电流信号。 通过包括电压放大器和电流源的比较电路将误差信号直接与电流信号进行比较。 误差信号耦合到电压放大器，其在电阻器的一侧保持相应的电压。 电流信号耦合到电流源，电流源连接到电阻器的另一侧，并保持电流流过电阻器的电流等于电流信号。 逆变器级中的电流脉冲由来自脉冲发生器电路的脉冲启动，并且当电流信号超过电流阈值电平时终止，该电流阈值电平被定义为电阻上保持的电压除以电阻器的电阻值。

公开(公告)号：US07564305B2

公开(公告)日：2009-07-21

申请号：US11938537

申请日：2007-11-12

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H03F1/26

CPC分类号： H03F1/3247 ,  H03F2200/321

摘要： A method for reducing distortion in a nonlinear device whereby nth-order intermodulation products are canceled. A test signal is applied to the input of the nonlinear device and amplitudes of nth- and mth-order intermodulation products are measured. Transfer function coefficients and an optimum value of a baseband resistance are calculated. A baseband resistance is applied to an output of the device. An input signal is applied to the input of the device and a mth-order intermodulation product is passed through the baseband resistance and added back to the input. A system for practicing the same includes a signal source that generates the test signal, a unit that measures the intermodulation products, a unit that calculates the transfer function coefficients and the optimum value of a baseband resistance, and a unit that applies the baseband resistance to the output of the device.

摘要翻译： 一种用于减少非线性装置中的失真的方法，其中n阶互调产物被取消。 将测试信号应用于非线性器件的输入，并测量第n和第m阶互调产物的幅度。 计算传递函数系数和基带电阻的最佳值。 基带电阻施加到器件的输出。 输入信号被施加到器件的输入端，第m阶互调产物通过基带电阻并加到输入端。 其实施方式的系统包括产生测试信号的信号源，测量互调产物的单元，计算基带电阻的传递函数系数和最佳值的单元，以及将基带电阻施加到 设备的输出。

公开(公告)号：US20090121788A1

公开(公告)日：2009-05-14

申请号：US11938537

申请日：2007-11-12

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H03F1/26 ,  H04B1/04

CPC分类号： H03F1/3247 ,  H03F2200/321

摘要： A method for reducing distortion in a nonlinear device whereby nth-order intermodulation products are canceled. A test signal is applied to the input of the nonlinear device and amplitudes of nth- and mth-order intermodulation products are measured. Transfer function coefficients and an optimum value of a baseband resistance are calculated. A baseband resistance is applied to an output of the device. An input signal is applied to the input of the device and a mth-order intermodulation product is passed through the baseband resistance and added back to the input. A system for practicing the same includes a signal source that generates the test signal, a unit that measures the intermodulation products, a unit that calculates the transfer function coefficients and the optimum value of a baseband resistance, and a unit that applies the baseband resistance to the output of the device.

摘要翻译： 一种用于减少非线性装置中的失真的方法，其中n阶互调产物被取消。 将测试信号应用于非线性器件的输入，并测量第n和第m阶互调产物的幅度。 计算传递函数系数和基带电阻的最佳值。 基带电阻施加到器件的输出。 输入信号被施加到器件的输入端，第m阶互调产物通过基带电阻并加到输入端。 其实施方式的系统包括产生测试信号的信号源，测量互调产物的单元，计算基带电阻的传递函数系数和最佳值的单元，以及将基带电阻施加到 设备的输出。

公开(公告)号：US07262948B2

公开(公告)日：2007-08-28

申请号：US11323983

申请日：2005-12-30

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H02H9/08 ,  H02H3/00

CPC分类号： H03K17/082

摘要： A system provides overload protection in power-switching circuitry, whereby current through a switch is controlled by adaptive circuitry. The switch, configured to deliver a current and a voltage, is connected to two current-limiting feedback circuits. The first current-limiting feedback circuit is coupled to the switch and limits the current through the switch based on current measured through the switch. The second current-limiting feedback circuit is configured to shunt current around the first current-limiting feedback circuit as a function of the voltage delivered to the load, which changes the amount of current the switch can deliver to the load.

摘要翻译： 系统在功率切换电路中提供过载保护，由此通过开关的电流由自适应电路控制。 配置为传送电流和电压的开关连接到两个限流反馈电路。 第一限流反馈电路耦合到开关，并基于通过开关测量的电流来限制通过开关的电流。 第二限流反馈电路被配置成作为传送到负载的电压的函数来分流围绕第一限流反馈电路的电流，其改变开关可以传递给负载的电流量。

公开(公告)号：US09502992B2

公开(公告)日：2016-11-22

申请号：US13486775

申请日：2012-06-01

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： H02M3/335 ,  H02M7/217

CPC分类号： H02M7/217

摘要： A voltage rectifier circuit having a storage element and a switching stage that is switchable to enable the storage element to capture a peak voltage of an alternating power source. The switching stage includes transistors arranged in a back-to-back configuration. In one example, the storage element is a capacitor and the transistors are PNP bipolar junction transistors. The configuration of the circuit enables reduced loading on the power source, as well as reduced sensitivity to temperature.

摘要翻译： 一种具有存储元件和开关级的电压整流器电路，其可切换以使得存储元件能够捕获交流电源的峰值电压。 开关级包括以背对背配置布置的晶体管。 在一个示例中，存储元件是电容器，并且晶体管是PNP双极结型晶体管。 电路的配置可以减少电源的负载，降低对温度的敏感性。

公开(公告)号：US08717082B2

公开(公告)日：2014-05-06

申请号：US13540312

申请日：2012-07-02

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： G06F1/04

CPC分类号： H03K3/017

摘要： An electrical circuit and a procedure for tracking at least one input pulse width applied to the electrical circuit. The electrical circuit includes a threshold component (e.g., a comparator) arranged to provide an output pulse width based on whether an input to the threshold component exceeds a threshold. The circuit also includes a controller arranged to control the threshold of the threshold component, based on the at least one input pulse width applied to the electrical circuit, such that the output pulse width of the threshold component tracks the at least one input pulse width applied to the electrical circuit. The controller includes at least a switch, and the output pulse width tracks the at least one input pulse width by following or anticipating the pulse width. In one example embodiment the tracking is performed for a series of pulses of varied widths.

摘要翻译： 用于跟踪施加到电路的至少一个输入脉冲宽度的电路和程序。 电路包括被配置为基于阈值分量的输入是否超过阈值来提供输出脉冲宽度的阈值分量（例如，比较器）。 电路还包括控制器，其被布置为基于施加到电路的至少一个输入脉冲宽度来控制阈值分量的阈值，使得阈值分量的输出脉冲宽度跟踪施加的至少一个输入脉冲宽度 到电路。 所述控制器至少包括开关，并且所述输出脉冲宽度通过跟踪或预测所述脉冲宽度来跟踪所述至少一个输入脉冲宽度。 在一个示例实施例中，对于一系列具有不同宽度的脉冲执行跟踪。

公开(公告)号：US20140002138A1

公开(公告)日：2014-01-02

申请号：US13540312

申请日：2012-07-02

申请人： Cecil W. Deisch

发明人： Cecil W. Deisch

IPC分类号： G01R29/027

CPC分类号： H03K3/017

摘要： An electrical circuit and a procedure for tracking at least one input pulse width applied to the electrical circuit. The electrical circuit includes a threshold component (e.g., a comparator) arranged to provide an output pulse width based on whether an input to the threshold component exceeds a threshold. The circuit also includes a controller arranged to control the threshold of the threshold component, based on the at least one input pulse width applied to the electrical circuit, such that the output pulse width of the threshold component tracks the at least one input pulse width applied to the electrical circuit. The controller includes at least a switch, and the output pulse width tracks the at least one input pulse width by following or anticipating the pulse width. In one example embodiment the tracking is performed for a series of pulses of varied widths.

摘要翻译： 用于跟踪施加到电路的至少一个输入脉冲宽度的电路和程序。 电路包括被配置为基于阈值分量的输入是否超过阈值来提供输出脉冲宽度的阈值分量（例如，比较器）。 电路还包括控制器，其被布置为基于施加到电路的至少一个输入脉冲宽度来控制阈值分量的阈值，使得阈值分量的输出脉冲宽度跟踪施加的至少一个输入脉冲宽度 到电路。 所述控制器至少包括开关，并且所述输出脉冲宽度通过跟踪或预测所述脉冲宽度来跟踪所述至少一个输入脉冲宽度。 在一个示例实施例中，对于一系列具有不同宽度的脉冲执行跟踪。

公开(公告)号：US20130322143A1

公开(公告)日：2013-12-05

申请号：US13486775

申请日：2012-06-01

申请人： CECIL W. DEISCH

发明人： CECIL W. DEISCH

IPC分类号： H02M7/217

CPC分类号： H02M7/217

摘要： A voltage rectifier circuit having a storage element and a switching stage that is switchable to enable the storage element to capture a peak voltage of an alternating power source. The switching stage includes transistors arranged in a back-to-back configuration. In one example, the storage element is a capacitor and the transistors are PNP bipolar junction transistors. The configuration of the circuit enables reduced loading on the power source, as well as reduced sensitivity to temperature.

摘要翻译： 一种具有存储元件和开关级的电压整流器电路，其可切换以使得存储元件能够捕获交流电源的峰值电压。 开关级包括以背对背配置布置的晶体管。 在一个示例中，存储元件是电容器，并且晶体管是PNP双极结型晶体管。 电路的配置可以减少电源的负载，降低对温度的敏感性。