Automated file relocation
    2.
    发明授权
    Automated file relocation 有权
    自动文件重定位

    公开(公告)号:US08768985B2

    公开(公告)日:2014-07-01

    申请号:US13369012

    申请日:2012-02-08

    CPC classification number: G06F17/30067 G06F17/30147

    Abstract: A processor-implemented method, system and/or computer program product for managing computer file storage is presented. A file, which is designated for storage, is received. Upon determining that the file exceeds a pre-determined size, the file is stored in a pre-designated folder that is reserved for oversized files. This pre-designated folder is protected such that any file stored within the pre-designated folder is prevented from being moved into archival storage.

    Abstract translation: 提出了一种用于管理计算机文件存储的处理器实现的方法,系统和/或计算机程序产品。 被指定用于存储的文件被接收。 在确定该文件超过预定大小时,该文件被存储在为超大文件保留的预先指定的文件夹中。 该预先指定的文件夹被保护,使得存储在预先指定的文件夹内的任何文件被阻止移动到档案存储。

    Communicating information in an information handling system
    3.
    发明授权
    Communicating information in an information handling system 失效
    在信息处理系统中沟通信息

    公开(公告)号:US08755268B2

    公开(公告)日:2014-06-17

    申请号:US12963719

    申请日:2010-12-09

    CPC classification number: G06F11/2005 G06F11/2007

    Abstract: A node communicates with a first network through a link aggregation of at least one primary port and at least one backup port. The link aggregation is for rerouting a communication with the first network to occur through the backup port in response to a malfunction in the communication through the primary port. In response to a malfunction in the communication through the backup port, the node communicates with a second network.

    Abstract translation: 节点通过至少一个主端口和至少一个备份端口的链路聚合与第一网络进行通信。 链路聚合是为了响应于通过主端口的通信故障,通过备份端口重新路由与第一网络的通信。 响应于通过备份端口的通信故障,节点与第二网络通信。

    Automated termination of selected software applications in response system events
    5.
    发明授权
    Automated termination of selected software applications in response system events 失效
    在响应系统事件中自动终止选定的软件应用程序

    公开(公告)号:US08255928B2

    公开(公告)日:2012-08-28

    申请号:US12389163

    申请日:2009-02-19

    CPC classification number: G06F9/485 G06F9/542

    Abstract: A process registers a system management event in an application configuration database. Responsive to detecting the registered system management event during execution of one application of the set of applications, the process identifies applications of the set of applications associated with the registered system management event that are executing. The process then terminates the applications of the set of applications associated with the registered system management event that are executing. Responsive to terminating the applications of the set of applications associated with the registered system managing event that are executing, the process then executes a handler that processes the registered system management event.

    Abstract translation: 进程在应用程序配置数据库中注册系统管理事件。 响应于在执行一组应用程序的一个应用程序期间检测注册的系统管理事件,该过程识别与正在执行的注册的系统管理事件相关联的应用程序的应用程序。 然后,该过程终止与正在执行的注册的系统管理事件相关联的一组应用的应用。 响应于终止与正在执行的注册系统管理事件相关联的一组应用的应用,该过程然后执行处理注册的系统管理事件的处理程序。

    HIGH PERFORMANCE CMOS DEVICES COMPRISING GAPPED DUAL STRESSORS WITH DIELECTRIC GAP FILLERS, AND METHODS OF FABRICATING THE SAME
    9.
    发明申请
    HIGH PERFORMANCE CMOS DEVICES COMPRISING GAPPED DUAL STRESSORS WITH DIELECTRIC GAP FILLERS, AND METHODS OF FABRICATING THE SAME 有权
    包含带有电介质隙隙填料的双层压缩机的高性能CMOS器件及其制造方法

    公开(公告)号:US20090321847A1

    公开(公告)日:2009-12-31

    申请号:US12556261

    申请日:2009-09-09

    Abstract: The present invention relates to complementary metal-oxide-semiconductor (CMOS) devices having gapped dual stressors with dielectric gap fillers. Specifically, each CMOS device of the present invention includes at least one n-channel field effect transistor (n-FET) and at least one p-channel field effect transistor (p-FET). A tensilely stressed dielectric layer overlays the n-FET, and a compressively stressed dielectric layer overlays the p-FET. A gap is located between the tensilely and compressively stressed dielectric layers and is filled with a dielectric filler material. In one specific embodiment of the present invention, both the tensilely and compressively stressed dielectric layers are covered by a layer of the dielectric filler material, which is essentially free of stress. In an alternatively embodiment of the present invention, the dielectric filler material is only present in the gap between the tensilely and compressively stressed dielectric layers.

    Abstract translation: 本发明涉及具有间隙填充物的具有间隙双重应力的互补金属氧化物半导体(CMOS)器件。 具体地,本发明的每个CMOS器件包括至少一个n沟道场效应晶体管(n-FET)和至少一个p沟道场效应晶体管(p-FET)。 拉伸应力介电层覆盖n-FET,并且压应力介电层覆盖p-FET。 间隙位于拉伸和压应力介电层之间,并填充有介电填料。 在本发明的一个具体实施方案中,拉伸和压缩应力介电层都被基本上没有应力的介电填料材料层覆盖。 在本发明的替代实施例中,电介质填充材料仅存在于拉伸和压缩应力介电层之间的间隙中。

    HERMETIC SEAL AND RELIABLE BONDING STRUCTURES FOR 3D APPLICATIONS
    10.
    发明申请
    HERMETIC SEAL AND RELIABLE BONDING STRUCTURES FOR 3D APPLICATIONS 有权
    用于3D应用的HERMETIC SEAL和可靠的结合结构

    公开(公告)号:US20090140404A1

    公开(公告)日:2009-06-04

    申请号:US12038501

    申请日:2008-02-27

    Abstract: A sealed microelectronic structure which provides mechanical stress endurance and includes at least two chips being electrically connected to a semiconductor structure at a plurality of locations. Each chip includes a continuous bonding material along it's perimeter and at least one support column connected to each of the chips positioned within the perimeter of each chip. Each support column extends outwardly such that when the at least two chips are positioned over one another the support columns are in mating relation to each other. A seal between the at least two chips results from the overlapping relation of the chip to one another such that the bonding material and support columns are in mating relation to each other. Thus, the seal is formed when the at least two chips are mated together, and results in a bonded chip structure.

    Abstract translation: 一种密封的微电子结构,其提供机械应力耐久性并且包括在多个位置处电连接到半导体结构的至少两个芯片。 每个芯片沿着其周边包括连续的接合材料,以及连接到位于每个芯片的周边内的每个芯片的至少一个支撑柱。 每个支撑柱向外延伸,使得当至少两个芯片彼此定位时,支撑柱彼此配合。 至少两个芯片之间的密封由芯片彼此的重叠关系产生,使得接合材料和支撑柱彼此配合。 因此,当至少两个芯片配合在一起时形成密封,并且导致粘合芯片结构。

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