METALORGANIC CHEMICAL VAPOR PHASE EPITAXY OR VAPOR PHASE DEPOSITION APPARATUS

    公开(公告)号:US20230212787A1

    公开(公告)日:2023-07-06

    申请号:US18121823

    申请日:2023-03-15

    摘要: A Metalorganic chemical vapor phase epitaxy or vapor phase deposition apparatus, having a first gas source system, a reactor, an exhaust gas system, and a control unit, wherein the first gas source system has a carrier gas source, a bubbler with an organometallic starting compound, and a first supply section leading to the reactor either directly or through a first control valve, the carrier gas source is connected to an inlet of the bubbler through a first mass flow controller by a second supply section, an outlet of the bubbler is connected to the first supply section, and the carrier gas source is connected to the first supply section through a second mass flow controller by a third supply section, the first supply section is connected to an inlet of the reactor through a third mass flow controller.

    Multi-junction solar cell with back-contacted front side

    公开(公告)号:US11640998B2

    公开(公告)日:2023-05-02

    申请号:US17007781

    申请日:2020-08-31

    发明人: Wolfgang Koestler

    摘要: A stacked multi-junction solar cell with a back-contacted front side, having a germanium substrate that forms a rear side of the multi-junction solar cell, a germanium sub-cell and at least two III-V sub-cells, successively in the named order, and at least one passage contact opening that extends from the front side of the multi-junction solar cell through the sub-cells to the rear side and a metallic connection contact that is guided through the passage contact opening. A diameter of the passage contact opening decreases in steps from the front side to the rear side of the multi-junction solar cell. The front side of the germanium sub-cell forms a first step having a first tread depth that circumferentially projects into the passage contact opening. The second step with a second tread depth circumferentially projects into the passage contact opening.

    NITRIDE SEMICONDUCTOR COMPONENT AND PROCESS FOR ITS PRODUCTION

    公开(公告)号:US20230028392A1

    公开(公告)日:2023-01-26

    申请号:US17959921

    申请日:2022-10-04

    摘要: A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 μm2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

    METHOD FOR THROUGH-HOLE PLATING
    6.
    发明申请

    公开(公告)号:US20220285567A1

    公开(公告)日:2022-09-08

    申请号:US17685074

    申请日:2022-03-02

    IPC分类号: H01L31/02 H01L31/18 B41M3/00

    摘要: A method for plating by means of a through-hole on a semiconductor wafer at least comprising the steps: providing a semiconductor wafer having a top side and a bottom side, wherein the semiconductor wafer has a plurality of solar cell stacks and comprises a substrate on the bottom side, and each solar cell stack has at least two III-V subcells, disposed on the substrate, and at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall, wherein the through-hole has a first edge region on the top side and a second edge region on the bottom side; applying an insulating layer to part of the first edge region, the side wall, and to the second edge region by means of a first printing process; and applying an electrically conductive layer.

    SOLAR CELL STACK
    7.
    发明申请

    公开(公告)号:US20220181510A1

    公开(公告)日:2022-06-09

    申请号:US17679929

    申请日:2022-02-24

    摘要: A solar cell stack includes a first semiconductor solar cell having a p-n junction made of a first material with a first lattice constant, a second semiconductor solar cell having a p-n junction made of a second material with a second lattice constant, and the first lattice constant being at least 0.008 Å smaller than the second lattice constant, and a metamorphic buffer. The metamorphic buffer is formed between the first semiconductor solar cell and the second semiconductor solar cell. The metamorphic buffer includes a series of at least five layers. The lattice constant increases in the series in the direction of the semiconductor solar cell. The lattice constants of the layers of the metamorphic buffer are larger than the first lattice constant. Two layers of the buffer having a doping and the difference in the dopant concentration between the two layers being greater than 4E17 cm−3.

    Solar cell stack
    9.
    发明授权

    公开(公告)号:US11296248B2

    公开(公告)日:2022-04-05

    申请号:US14937424

    申请日:2015-11-10

    摘要: A solar cell stack, having a first semiconductor solar cell having a p-n junction made of a first material with a first lattice constant, and a second semiconductor solar cell having a p-n junction made of a second material with a second lattice constant, and the first lattice constant being at least 0.008 Å smaller than the second lattice constant, and a metamorphic buffer, the metamorphic buffer being formed between the first semiconductor solar cell and the second semiconductor solar cell, and the metamorphic buffer including a series of three layers, and the lattice constant increasing in a series in the direction of the semiconductor solar cell, and the lattice constants of the layers of the metamorphic buffer being bigger than the first lattice constant, two layers of the buffer having a doping, and the difference in the dopant concentration between the two layers being greater than 4E17 cm−3.

    VERTICAL HIGH-BLOCKING III-V BIPOLAR TRANSISTOR

    公开(公告)号:US20220005942A1

    公开(公告)日:2022-01-06

    申请号:US17368279

    申请日:2021-07-06

    摘要: A vertical high-blocking III-V bipolar transistor, which includes an emitter, a base and a collector. The emitter has a highly doped emitter semiconductor contact region of a first conductivity type and a first lattice constant. The base has a low-doped base semiconductor region of a second conductivity type and the first lattice constant. The collector has a layered low-doped collector semiconductor region of the first conductivity type with a layer thickness greater than 10 μm and the first lattice constant. The collector has a layered highly doped collector semiconductor contact region of the first conductivity type. A first metallic connecting contact layer is formed in regions being integrally connected to the emitter. A second metallic connecting contact layer is formed in regions being integrally connected to the base. A third metallic connecting contact region is formed at least in regions being arranged beneath the collector.