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公开(公告)号：US12119958B2
公开(公告)日：2024-10-15
申请号：US18349148
申请日：2023-07-09
发明人： Daniel Marcovitch , Idan Burstein , Liran Liss , Hillel Chapman , Dror Goldenberg , Michael Kagan , Aviad Yehezkel , Peter Paneah
IPC分类号： H04L12/46 , G06F13/40 , G06F13/42 , G06F15/173
CPC分类号： H04L12/4625 , G06F13/4027 , G06F13/4208 , G06F15/17331 , H04L12/4633 , G06F2213/0026
摘要： A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
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公开(公告)号：US12052033B2
公开(公告)日：2024-07-30
申请号：US17863425
申请日：2022-07-13
申请人： Apple Inc.
发明人： Roy Roth , Yonathan Tate
CPC分类号： H03M13/1131 , H03M13/1134 , H03M13/1137 , H03M13/1108 , H03M13/2948 , H03M13/43
摘要： A decoder includes circuitry and multiple Variable-Node Circuits (VNCs). The VNCs individually hold one or more variables of an Error Correction Code (ECC) that is representable by a plurality of check equations defined over the variables. The circuitry is configured to receive a code word including variables having m-bit values that was encoded using the ECC, to further receive reliability levels assigned respectively to the variables, to decode the code word by applying to the code word a sequence of iterations, including deciding in a given iteration whether a given VNC is to be processed or skipped in that iteration, depending on the reliability levels assigned to the variables of the given VNC, and, when the given VNC is selected for processing, to make a decision whether or not to update one or more of the variables of the given VNC, and to apply the decision by the given VNC.
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公开(公告)号：US12039345B2
公开(公告)日：2024-07-16
申请号：US17849644
申请日：2022-06-26
发明人： Amit Wix , Roee Peled
IPC分类号： G06F9/445 , G06F3/0481 , G06F3/0484 , G06F3/16 , G06F9/451
CPC分类号： G06F9/44521 , G06F3/0481 , G06F3/0484 , G06F3/165 , G06F9/445 , G06F9/44578 , G06F9/451
摘要： A user device (24) includes an audio output device (58) and one or more processors (44). The one or more processors are configured to run an Operating System (OS—48), including running an OS component for coordinating outputting of audio generated by user applications (26) to the audio output device, to preload a user application, and, while the user application is in a preload state, to inhibit the audio generated by the preloaded user application using the OS component.
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公开(公告)号：US12010042B2
公开(公告)日：2024-06-11
申请号：US17779157
申请日：2019-11-28
发明人： Ioannis (Giannis) Patronas , Paraskevas Bakopoulos , Eitan Zahavi , Eran Aharon , Elad Mentovich
IPC分类号： H04L49/253
CPC分类号： H04L49/254
摘要： A routing controller (30) includes an interface (68) and multiple processors (60) The interface is configured to receive a permutation (76) defining requested interconnections between N input ports and N output ports of a Benes network (24). The Benes network includes multiple 2-by-2 switches (42), and is reducible in a plurality of nested subnetworks associated with respective nesting levels, down to irreducible subnetworks including a single 2-by-2 switch. The multiple processors are configured to collectively determine a setting of the 2-by-2 switches that implements the received permutation, including determining sub-settings for two or more subnetworks of a given nesting level in parallel, and to configure the multiple 2-by-2 switches of the Benes network in accordance with the determined setting.
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公开(公告)号：US11977259B2
公开(公告)日：2024-05-07
申请号：US18261675
申请日：2022-08-17
申请人： LYTE AI, INC.
发明人： Arman Hajati , Yuval Gerson , Alexander Shpunt
CPC分类号： G02B6/2817 , G01S7/4814 , G01S7/4816 , G01S7/4817 , G01S17/34 , G02B6/0208 , G02B6/3588 , G02B2006/1215
摘要： An optoelectronic device (20, 50) includes a planar substrate (30), an optical bus (40, 82, 84, 96, 140, 150, 180, 182, 224) disposed on the substrate and configured to convey coherent radiation through the bus, and an array (32, 72) of sensing cells (34, 74, 90, 160, 170, 200, 212, 380) disposed on the substrate. Each sensing cell includes at least one tap (92, 94, 144, 146, 226, 228) coupled to extract a portion of the coherent radiation propagating through the optical bus, an optical transducer (36, 108, 162, 172, 202, 204, 214) configured to couple optical radiation between the sensing cell and a target external to the substrate, and a receiver (114, 174, 178, 216, 218), which is coupled to mix the coherent radiation extracted by the tap with the optical radiation received by the optical transducer and to output an electrical signal responsively to the mixed radiation.
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公开(公告)号：US11967963B2
公开(公告)日：2024-04-23
申请号：US17690063
申请日：2022-03-09
发明人： Raanan Ivry
CPC分类号： H03L7/0994 , H02M1/0003 , H03M3/37
摘要： An Integrated Circuit (IC) includes feedback control-loop (FCL) circuitry to generate a delay-compensated output signal responsively to an input reference signal. The FCL circuitry includes a main feedback path, a first subtractor, a delay-compensation feedback path, and a second subtractor. The main feedback path is to generate a main feedback signal responsively to the delay-compensated output signal. The first subtractor is to generate a non-compensated output signal responsively to a difference between the main feedback signal and the input reference signal. The delay-compensation feedback path is to generate a delay-compensation feedback signal responsively to the delay-compensated output signal. The second subtractor is to generate the delay-compensated output signal responsively to a difference between the non-compensated output signal and the delay-compensation feedback signal.
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公开(公告)号：US11966310B1
公开(公告)日：2024-04-23
申请号：US17981508
申请日：2022-11-07
发明人： Alon Singer , Ziv Battat , Liron Mula
CPC分类号： G06F11/3037 , G06F11/079 , G06F11/3075 , G06F11/3409
摘要： An Integrated Circuit (IC) includes one or more functional hardware circuits, one or more processor cores, a cause-tree circuit, a memory buffer, and an analysis circuit. The processor cores are to handle events occurring in the functional hardware circuits. The cause-tree circuit includes leaf nodes, middle nodes and a root node. The leaf nodes are to collect the events from the one or more functional hardware circuits. The middle nodes are to coalesce the collected events and to deliver the events to the root node. The memory buffer is to buffer a plurality of the events delivered to the root node, so as to trigger the processor cores to handle the buffered events. The buffer analysis circuit is to analyze a performance of the cause-tree circuit based on the events buffered in the memory buffer.
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公开(公告)号：US11929934B2
公开(公告)日：2024-03-12
申请号：US17730246
申请日：2022-04-27
发明人： Liran Liss , Ortal Bashan , Aviad Levy , Lion Levi
IPC分类号： H04L47/10
CPC分类号： H04L47/39
摘要： A communication apparatus includes input circuitry, an encapsulator, transmission circuitry and flow control circuitry. The input circuitry is to receive packets from a data source in accordance with a first communication protocol that employs credit-based flow control. The encapsulator is to buffer the packets in a memory buffer and to encapsulate the buffered packets in accordance with a second communication protocol. The transmission circuitry is to transmit the encapsulated packets over a communication link in accordance with the second communication protocol. The flow control circuitry is to receive from the encapsulator buffer status indications that are indicative of a fill level of the memory buffer, and to exchange credit messages with the data source, in accordance with the credit-based flow control of the first communication protocol, responsively to the buffer status indications.
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公开(公告)号：US11927771B2
公开(公告)日：2024-03-12
申请号：US17521880
申请日：2021-11-09
发明人： Yoav Yadin , Yariv Haddad , Alex Alon
摘要： Optical apparatus includes an electrically-tunable lens, including an electro-optical layer, having, for a given polarization of light incident on the layer, an effective local index of refraction at any given location within an active area of the electro-optical layer that is determined by a voltage waveform applied across the electro-optical layer at the location. Conductive electrodes extend over opposing first and second sides of the electro-optical layer and include an array of excitation electrodes. Control circuitry applies control voltage waveforms to the excitation electrodes. A polarization rotator is positioned and configured to intercept incoming light that is directed toward the lens and to rotate a polarization of the intercepted light so as to ensure that the light incident on the electro-optical layer has a component of the given polarization regardless of an initial linear polarization of the intercepted light.
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公开(公告)号：US11914078B2
公开(公告)日：2024-02-27
申请号：US17268963
申请日：2019-09-02
申请人： APPLE INC.
发明人： David Silver , Moshe Laifenfeld , Tal Kaitz
摘要： Imaging apparatus (22) includes a radiation source (40), which emits pulsed beams (42) of optical radiation toward a target scene (24). An array (52) of sensing elements (78) output signals indicative of respective times of incidence of photons in a first image of the target scene that is formed on the array of sensing elements. An image sensor (64) captures a second image of the target scene in registration with the first image. Processing and control circuitry (56, 58) identifies, responsively to the signals, areas of the array on which the pulses of optical radiation reflected from corresponding regions of the target scene are incident, and processes the signals from the sensing elements in the identified areas in order measure depth coordinates of the corresponding regions of the target scene based on the times of incidence, while identifying, responsively to the second image, one or more of the regions of the target scene as no-depth regions.
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