公开(公告)号：US07605052B2

公开(公告)日：2009-10-20

申请号：US11870564

申请日：2007-10-11

申请人： Joseph A. Czagas ,  Dustin A. Woodbury ,  James D. Beasom

发明人： Joseph A. Czagas ,  Dustin A. Woodbury ,  James D. Beasom

IPC分类号： H01L21/30

CPC分类号： H01L21/2253 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/26513 ,  H01L21/74 ,  H01L21/76251 ,  H01L29/0615 ,  H01L29/10 ,  H01L29/1079 ,  H01L29/1083 ,  Y10S438/933

摘要： A method for forming a diffused, doped backside layer on a device wafer oxide bonded to a handle wafer in an integrated circuit is provided. The method comprises forming a thermal bond oxide layer on a backside surface of the device wafer of the integrated circuit. Implanting the bond oxide with a diffusing dopant. Diffusing dopant from the bond oxide into the backside surface of the device wafer. Depositing an oxide layer on the bond oxide and bonding the deposited oxide layer to the handle wafer of the integrated circuit.

摘要翻译： 提供了在集成电路中结合到处理晶片的器件晶片氧化物上形成扩散的掺杂​​背面层的方法。 该方法包括在集成电路的器件晶片的背面上形成热粘合氧化物层。 用扩散掺杂剂注入键合氧化物。 将掺杂剂从结合氧化物扩散到器件晶片的背面。 在结合氧化物上沉积氧化物层并将沉积的氧化物层结合到集成电路的处理晶片。

公开(公告)号：US20080088274A1

公开(公告)日：2008-04-17

申请号：US11696990

申请日：2007-04-05

申请人： ERIC MAGNE SOLIE ,  RONIL DEPAK PATEL ,  TU A. BUI

发明人： ERIC MAGNE SOLIE ,  RONIL DEPAK PATEL ,  TU A. BUI

IPC分类号： H02J7/06

CPC分类号： H02J7/022 ,  H02J7/0072

摘要： The charging circuit for charging a battery of an electronic device using a connected AC power adaptor includes circuitry responsive to an applied regulated voltage for charging the battery connected to the charging circuitry. The circuitry prevents the regulated voltage applied to the circuitry from falling below a settable voltage level. Additionally, the circuitry switches a charging current between a quick charge level and a trickle charge level responsive to a state of a transistor.

摘要翻译： 使用连接的AC电源适配器对电子设备的电池充电的充电电路包括响应于施加的调节电压的电路，用于对连接到充电电路的电池进行充电。 电路防止施加到电路的稳压电压降到可设置的电压电平以下。 另外，电路根据晶体管的状态，在快速充电电平和涓流充电电平之间切换充电电流。

公开(公告)号：US06873703B1

公开(公告)日：2005-03-29

申请号：US09686505

申请日：2000-10-11

申请人： Leonel Ernesto Enriquez

发明人： Leonel Ernesto Enriquez

IPC分类号： H04M1/738 ,  H04M1/00 ,  H04M9/00 ,  H04M9/08

CPC分类号： H04M1/738

摘要： A transmission channel for a subscriber line interface circuit comprises a front end, tip/ring current-sensing transimpedance stage, containing relatively low valued tip and ring sense resistors coupled in circuit with tip and ring paths of a telecommunication wireline pair. The front end transimpedance stage transforms differential tip and ring input currents sensed by the tip and ring sense resistors into a single ended voltage, which is coupled to a transconductance amplifier filter/gain stage. The filter/gain stage is configured to provide a programmable output impedance, and converts the voltage from the current-sensing transimpedance stage into an output transmission voltage for application to a selected one of a current-sense, voltage-feed, or voltage-sense, voltage-feed telecommunication circuit.

摘要翻译： 用户线路接口电路的传输通道包括前端，尖端/环路电流检测跨阻抗级，其包含与通信电缆线对的尖端和环形路径电路耦合的相对低价值尖端和环形检测电阻器。 前端跨阻抗级将由尖端和环形感测电阻器检测到的差分尖端和环形输入电流转换为单端电压，其连接到跨导放大器滤波器/增益级。 滤波器/增益级被配置为提供可编程输出阻抗，并将来自电流检测跨导级的电压转换为输出传输电压，以应用于电流检测，电压馈送或电压感测 电压馈电电路。

公开(公告)号：US06862352B1

公开(公告)日：2005-03-01

申请号：US09686247

申请日：2000-10-11

申请人： Leonel Ernesto Enriquez

发明人： Leonel Ernesto Enriquez

IPC分类号： H04M3/00 ,  H04M3/22 ,  H04M1/00

CPC分类号： H04M3/005

摘要： A controllably switched arrangement selectively couples multiple circuit functions, such as reverse polarity detection, ring-trip and line voltage measurement, of a telecommunication card to the same external programming component (e.g., capacitor) on an as needed basis, by means of associated coupling circuits and a controlled switching circuit. The coupling circuits are controllably enabled/disabled in association with the particular circuit function required, while the controlled switching circuit selectively connects each coupling circuit with the external component. Through combined control of the coupling circuits and the switching circuit, respectively different circuit functions can be implemented with the same external component.

摘要翻译： 可控切换装置通过相关的耦合将电信卡的多个电路功能（例如反向极性检测，跳闸和线路电压测量）选择性地耦合到相同的外部编程组件（例如，电容器） 电路和受控开关电路。 耦合电路与所需的特定电路功能相关联地被控制地启用/禁用，而受控开关电路选择性地将每个耦合电路与外部部件连接。 通过耦合电路和开关电路的组合控制，可以使用相同的外部元件实现不同的电路功能。

公开(公告)号：US20040238903A1

公开(公告)日：2004-12-02

申请号：US10882387

申请日：2004-07-02

申请人： Intersil Corporation

发明人： Jun Zeng ,  Gary Mark Dolry ,  Praveen MurAleedharan

IPC分类号： H01L029/76

CPC分类号： H01L29/0615 ,  H01L29/1608 ,  H01L29/267 ,  Y10S438/931

摘要： A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conduction type disposed on the substrate. The upper layer comprises a well region of a second, opposite conduction type adjacent an edge termination zone that comprises a layer of a material having a higher critical electric field than silicon. Both the well region and adjacent edge termination zone are disposed at an upper surface of the upper layer, and an oxide layer overlies the upper layer and the edge termination zone. A process for forming a silicon die having improved edge termination. The process comprises forming an upper layer comprising doped silicon of a first conduction type on a heavily doped silicon substrate, and forming an edge termination zone that comprises a layer of a material having a higher critical electric field than silicon at an upper surface of the upper layer. A well region of a second, opposite conduction type is formed at the upper surface of the upper layer adjacent the edge termination zone, and an oxide layer is formed over the upper layer and edge termination zone.

公开(公告)号：US20020158613A1

公开(公告)日：2002-10-31

申请号：US10093197

申请日：2002-03-07

申请人： INTERSIL CORPORATION

发明人： Volodymyr A. Muratov ,  Robert G. Hodgins ,  Thomas A. Jochum

IPC分类号： G05F001/40

CPC分类号： H02M3/1563 ,  H02M3/158 ,  H02M2001/0032 ,  Y02B70/16

摘要： A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

摘要翻译： DC-DC转换器具有脉宽调制器PWM）和滞后（波动）调制器。 对于低电流负载，选择迟滞调制器; 对于高电流负载，选择PWM。 模式选择开关在每个开关周期结束时感测开关输出电压的极性。 如果极性从一个周期变化到下一个周期，则该模式可以立即改变到另一个模式。 计数器用于在每个周期结束时记录极性，并且可以通过计数器延迟从一个模式切换到另一个模式，以防止基于杂散输出电压波动的变化模式。

公开(公告)号：US20010009088A1

公开(公告)日：2001-07-26

申请号：US09800902

申请日：2001-03-07

申请人： INTERSIL CORPORATION

发明人： Jesse E. Grossman

IPC分类号： E02B003/04

CPC分类号： E02D29/0283

摘要： The modular wall includes a sheet pile wall 12 with support brackets 20 that provide cantilever support to a facade of interlocking rows of blocks 30-34. The support member 20 includes vertical members that extend from the top of the sheet piling part way down the length of the sheet piling. Base members 24 extend from the vertical members and are supported by angled braces 22. Horizontally extending key members rest on the base members and are affixed thereto. The key members provide a key for connecting to a slot of a first row of modular blocks. The modular blocks are stabilized by geogrid 28 that is captured in the key and slot interconnection of the modular blocks and is affixed to the sheet piling 12 or embedded in concrete fill.

摘要翻译： 模块化墙壁包括具有支撑托架20的片材桩壁12，其向互锁的块块30-34的立面提供悬臂支撑。 支撑构件20包括垂直构件，其从片材打桩部分的顶部向下延伸到片材堆的长度。 基部构件24从垂直构件延伸并且由倾斜的支架22支撑。水平延伸的键构件搁置在基座构件上并且固定到其上。 关键构件提供了连接到第一排模块的插槽的键。 模块化块由土工格栅28稳定，其被模块化块的钥匙和槽互连中捕获，并被固定到片材堆叠12或嵌入混凝土填充物中。

公开(公告)号：US6167131A

公开(公告)日：2000-12-26

申请号：US27257

申请日：1998-02-20

申请人： Randy Thomas Heilman

发明人： Randy Thomas Heilman

IPC分类号： H04M3/02

CPC分类号： H04M3/02

摘要： In a local loop telephone system, a voltage limited device having circuitry to provide subscriber interface functions and generate a ring signal. The device comprises four switches in a full bridge drive configuration. An external source provides a constant voltage which converted into an alternating ring voltage by triggering the switches in a specified sequence.

摘要翻译： 在本地环路电话系统中，电压限制装置具有提供用户接口功能并产生振铃信号的电路。 该设备包括全桥驱动器配置中的四个开关。 外部源通过以指定的顺序触发开关来提供恒定的电压，其被转换成交替的环形电压。

公开(公告)号：US6118398A

公开(公告)日：2000-09-12

申请号：US149154

申请日：1998-09-08

申请人： Gregory J. Fisher ,  Mario Sanchez ,  Kantilal Bacrania

发明人： Gregory J. Fisher ,  Mario Sanchez ,  Kantilal Bacrania

IPC分类号： H03M1/06 ,  H03M1/68 ,  H03M1/74 ,  H03M1/66

CPC分类号： H03M1/0653 ,  H03M1/687 ,  H03M1/745 ,  H03M1/747

摘要： A digital-to-analog converter (DAC) includes a plurality of current sources on a substrate operable in a predetermined sequence of use for generating an output current based upon a digital input, and a connection network for establishing the predetermined sequence of use for the current sources based upon the actual current values and to increase performance of the DAC. For example, the predetermined sequence of use can be set to reduce integral non-linearity error of the DAC. The connection network may be provided by a plurality of fusible links selectively connected to set the predetermined sequence of use. The current sources may include a first group of most significant bit (MSB) current sources for a predetermined number of MSBs. In addition, the plurality of current sources may include a second group of mid-most significant bit (mid MSBs) current sources for a predetermined number of mid MSBs. The plurality of current sources have actual values sortable from lowest to highest, and each actual current value will define an error value with both a magnitude and polarity relative to the desired value. One embodiment for sorting the order of use of the current sources is based upon the error values.

摘要翻译： 数模转换器（DAC）包括在基板上的多个电流源，其可以按照预定的使用顺序操作，用于基于数字输入产生输出电流;以及连接网络，用于建立用于 基于实际电流值的电流源和增加DAC的性能。 例如，可以设定预定的使用顺序以减小DAC的积分非线性误差。 连接网络可以由选择性地连接以设置预定使用顺序的多个可熔链路提供。 当前源可以包括用于预定数量的MSB的第一组最高有效位（MSB）电流源。 另外，多个电流源可以包括用于预定数量的中间MSB的第二组最高有效位（中间MSB）电流源。 多个电流源具有从最低到最高的实际值，并且每个实际电流值将定义具有相对于期望值的幅度和极性的误差值。 用于对当前源的使用顺序进行排序的一个实施例基于错误值。

公开(公告)号：US6058030A

公开(公告)日：2000-05-02

申请号：US974862

申请日：1997-11-20

申请人： Charles E. Hawkes ,  Michael M. Walters ,  Thomas A. Jochum

发明人： Charles E. Hawkes ,  Michael M. Walters ,  Thomas A. Jochum

IPC分类号： H02M3/00 ,  H02J1/10 ,  H02M3/156 ,  G05F1/40 ,  G05F1/44 ,  H02M7/00

CPC分类号： H02M3/156 ,  H02J1/102

摘要： A circuit includes a plurality of DC-to-DC converter circuits and separates in time switching of the respective power switches of the DC-to-DC converter circuits which would otherwise be switching at nearly a same time, such as based upon a same desired output level. The switching time may be separated by inverting a periodic control waveform of at least one of the DC-to-DC converter circuits. The multiple output DC-to-DC converter circuit thereby provides an increased noise margin and operates with greater accuracy and stability. The circuit may also determine when the DC-to-DC converter circuits would otherwise be switching at nearly the same time, and activate the switching time separation responsive thereto. For example, the determination may be made based upon a selectable output level being within a predetermined range of at least one other output level. The circuit in accordance with the invention is particularly advantageous for a single integrated circuit implementation, and may be used, for example, on a portable computer motherboard.

摘要翻译： 电路包括多个DC-DC转换器电路，并且在DC-DC转换器电路的各个功率开关的时间切换中分离，否则将在几乎相同的时间进行切换，例如基于相同的期望 输出电平。 可以通过反转DC-DC转换器电路中的至少一个的周期性控制波形来分离开关时间。 多输出DC-DC转换器电路由此提供增加的噪声容限并以更高的精度和稳定性操作。 电路还可以确定DC-DC转换器电路何时将在几乎相同的时间切换，并且响应于此激活开关时间分离。 例如，可以基于可选择的输出电平在至少一个其他输出电平的预定范围内进行确定。 根据本发明的电路对于单个集成电路实现特别有利，并且可以例如用在便携式计算机主板上。