摘要:
A digital media content (e.g., image, video, audio, etc.) encoder/decoder employs a spatially varying parameter to condition the application of an overlap pre-process and post-process to adjacent transform block edges for the spatial-domain lapped transform. This conditional application of the lapped transform to sub-blocks of the digital media can be signaled on an edge, block, macro-block or other granularity. Further, a restriction on use of the conditional lapped transform based on a frame-level quantization or other bit-rate related parameter minimizes the signaling overhead impact at low bit-rates of coding.
摘要:
An encoder/decoder uses intra-coded B-fields [“BI-fields”]. For example, rather than encoding many of the macroblocks in a field as intra macroblocks at a scene change, an encoder can choose to encode the entire field as intra. Encoding an entire field as a BI-field allows increased coding efficiency through reduced coding overhead at macroblock level, and without intra-frame dependency, the BI-field can still be dropped if appropriate in low-bitrate applications.
摘要:
The present invention provides a processor including a bit-shift circuit for inputting pieces of data held sequentially in a main register and an auxiliary register, shifting the piece of data bit after bit in accordance with a pointer and a bit count and outputting the shifted data by execution of an unpacking instruction specifying the bit count; a mask circuit for masking data output by the bit-shift circuit in accordance with the pointer and the bit count in the execution of the unpacking instruction; and a pointer-updating circuit for updating the value of the pointer by the bit count in the execution of the unpacking instruction.
摘要:
The disclosed data compressor receives an input stream of data characters and provides a corresponding stream of output codes. The compressor generates a sequence of numerically increasing output codes corresponding to numerically increasing contiguous segments of a detected run of the same data character. Non-run characters of the input stream are transmitted directly in synchronism with incrementing the codes of the code sequence. In one embodiment, the number of characters in the run segments are stored together with the respective codes representing the segments. In later encounters of a previously processed run, the stored data is accessed and the stored codes corresponding to the run segments are output as appropriate.
摘要:
In an encoding method which utilizes plural codebooks, certain bits of a user data input sequence are considered as branch selection bit(s) which determine (1) how the remainder of the input sequence is to be divided into plural subsequences and (2) which codebooks are addressed using the plural subsequences in order to generate corresponding plural output sequences. The plural output sequences are then concatentated together to form a codeword. The method reduces the size of the codebooks that otherwise would be employed for the particular code involved in the encoding method. The encoding of the present invention is particularly suitable for a Quadbit Modulo 2 (QM2) code.
摘要:
A variable-length coding device includes: a code presence/absence determination table storing information concerning whether a code is allocated or not correspondingly to a prescribed region in a region represented by a combination of run data and level data; a first region determination circuit and a second region determination circuit determining whether a pair of run data and level data is contained in the prescribed region; and a run.level pair conversion circuit, a first code table, and a second code table that perform coding, referring to the code presence/absence determination table, if the first region determination circuit and the second region determination circuit determine that the pair of run data and level data is contained in the prescribed region, and that perform coding without referring to the code presence/absence determination table if the first region determination circuit and the second region determination circuit determine that the pair of run data and level data is not contained in the prescribed region.
摘要:
The disclosed data compressor receives an input stream of data characters and provides a corresponding stream of output codes. The compressor provides a sequence of numerically increasing output codes corresponding to numerically increasing contiguous segments of a detected run of the same character. The number of characters in the detected run is determined and a mathematical algorithm, using the number of characters in the run, mathematically generates the appropriate sequence of codes. One disclosed embodiment utilizes a mathematical algorithm that iteratively diminishes the number of run characters by an iteratively increasing segment index. Another embodiment utilizes a quadratic equation algorithm that computes the codes from the number of characters in the run utilizing equations derived from the expression for the sum of the first n numbers. In a further embodiment, the number of characters in the run segments are stored together with the respective codes representing the segments. In later encounters of a previously processed run, the stored data is accessed and the stored codes corresponding to the run segments are output as appropriate. Non-run characters of the input stream are transmitted directly in synchronism with incrementing the codes of the code sequence.
摘要:
A video data run length decoding apparatus is disclosed. The aparatus includes a run length decoder for analyzing a run value of a coded video data, generating a run value, and alternately outputting an interval of a 8-clock signal in which there is a data and another interval of a 8-clock signal in which there is not a data using a gap clock signal, a reverse zig zag and dequantizer for processing a data from the run length decoder based on the reverse zig zag and dequantization operation, and a reverse discrete cosine converter for processing a data outputted from the reverse zig zag and dequantizer, two times, based on the reverse discrete cosine conversion and outputting a two-dimensional video data, thereby decreasing the number of gates of a decoding apparatus and implementing a high speed system by alternately outputting an interval in which there is a data and another interval in which there is not a data using a gap clock signal generator in a run length decoder for a video data run length decoding apparatus.
摘要:
In a modulation processing unit, m bits of input data are converted to an n bit fixed length code. In an RML conversion unit, a restriction code which limits a minimum run d in a channel bit sequence after converting the fixed length code from repeatedly occurring a predetermined number of times, is converted to a data sequence. A clock is stably reproduced.
摘要:
A method, apparatus and article of manufacture performs an image processing operation directly on the runs of a runlength encoded bitmap of pixels. In the method, a first selection step selects, in the first instance, at least two runs from one or more series of runs of one or more images on the basis of pixel position information. A runlength processing operation is then performed on the selected runs in accordance with the image processing operation in order to obtain a resultant run having a resultant runlength and a resultant pixel value. In a shortening step the runlengths of the processed runs are shortened by a value derived from the determined resultant runlength. In a step size determining step a step size is derived from the resultant runlength. Thereafter, in a second selection step, one or more shortened runs and/or one or more following runs from the one or more series of runs of the one or more images are selected on the basis of the step size information and the above-mentioned steps are performed again until all the runs have been processed.