Abstract:
The present disclosure relates to devices and methods for reducing power consumption of a display. One electronic display includes a first switch coupled between a first gate of a first transistor and a second gate of a second transistor to selectively connect the first gate to the second gate. The display includes a second switch coupled between the second gate of the second transistor and a third gate of a third transistor to selectively connect the second gate to the third gate. The display also includes driving circuitry that controls the first switch to connect the first gate to the second gate to share a first charge between the first and second gates. The driving circuitry also controls the second switch to connect the second gate to the third gate to share a second charge between the second and third gates. Accordingly, power consumption of the display may be reduced.
Abstract:
This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.
Abstract:
A electronic display device designed to calibrate brightness levels in a flat-panel display by using adjacent code calibration for a variable electroluminescence voltage supply in the flat-panel display.
Abstract:
Systems and methods are described here to compensate for crosstalk (e.g., coupling distortions) that may be caused by a fanout overlaid or otherwise affecting signals transmitted within an active area of an electronic display. The systems and methods may be based on buffered previous image data. Technical effects associated with compensating for the crosstalk may include improved display of image frames since some image artifacts are mitigated and/or made unperceivable or eliminated.
Abstract:
To reduce overall power consumption for an electronic display power management integrated circuit (PMIC), one of multiple electric power converters and/or electric power regulators may be selected based on an electrical load (e.g., due to the total brightness of the content displayed) on the electronic display at a given moment. In some embodiments, the PMIC may include a less efficient heavy load converter designed with high-current handling capability and a more efficient light load (e.g., low current) converter with lower current handling capability. A controller may dynamically select between the converters depending on a present load or an expected load on the electronic display.
Abstract:
This disclosure provide various techniques for tracking emission profiles on an electronic display. An emission profile may be applied to the electronic display in order to illuminate certain pixels and deactivate (e.g., turn off) certain pixels in the electronic display to facilitate refreshing (e.g., programming with new image data) the deactivated pixels. A real-time row-based average pixel level or average pixel luminance calculation architecture may track the one or more EM profiles to accurately model EM profile behavior, which may enable accurate calculation of the average pixel level or average pixel luminance of the electronic display at any one point in time. The accurate average pixel level or average pixel luminance calculations effectuated by the EM profile tracking may be used to reduce the IR drop, improve real-time peak-luminance control, and improve the performance of under-display sensors, among other advantages.
Abstract:
This disclosure provides various techniques for providing fine-grain digital and analog pixel compensation to account for voltage error across an electronic display. By employing a two-dimensional digital compensation and a local analog compensation, a fine-grain and robust pixel compensation scheme may be provided to the electronic display.
Abstract:
A current-voltage (IV) relationship of a pixel having a diode is initially determined. A first voltage is determined that does not cause the diode to emit light, and a first current across the diode is sensed by applying the first voltage. A predetermined current is determined based on the first voltage and the IV relationship. A ratio is determined based on the first current, a target current, and the predetermined current. A ratio voltage is determined by applying the ratio to a predetermined target voltage. If the first current is less than the predetermined current, then the ratio voltage is applied to supply a target current to the diode. If the first current is greater than the predetermined current, then a second voltage is determined by averaging the first test voltage and the ratio voltage, and the second voltage is applied to supply the target current to the diode.
Abstract:
Systems and methods are presently disclosed that compensate for temperature-based parasitic capacitance variation of a pixel of a display by causing a driver transistor of the pixel to enter an ohmic or linear region. A lookup table is generated based on temperatures at the pixel, diode voltages, and target diode currents or luminances at a diode of the pixel. A correction voltage is determined based on a target diode current or luminance, a temperature at the pixel, and the lookup table. A data voltage is applied corresponding to the target diode current or luminance and the correction voltage to the driver transistor.
Abstract:
A system may include an electronic display panel having multiple pixels for depicting image data and processing circuitry that may receive a first error value representative of a first difference between a first electrical signal measured at a first pixel of the multiple pixels and an expected electrical signal for the first pixel. The first electrical signal may be based on a test signal transmitted to the first pixel and the expected electrical signal may correspond to an expected response of the first pixel based on the test signal. The processing circuitry may filter the first error value to generate a first compensated error value and may filter the first error value based on the first compensated error value to generate a second compensated error value, where the second compensated error value may filter one or more effects of spatial crosstalk between one or more pixels near the first pixel.