公开(公告)号：US20240013693A1

公开(公告)日：2024-01-11

申请号：US18296937

申请日：2023-04-06

Applicant: Apple Inc.

Inventor： Jie Won Ryu ,  Kingsuk Brahma ,  Qing Li ,  Shawn P. Hurley ,  Ce Zhang ,  Warren S Rieutort-Louis ,  Feng Wen ,  Marc J. DeVincentis ,  Zhe Hua ,  Hyunwoo Nho

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2340/0435 ,  G09G2310/08 ,  G09G2330/021

Abstract: This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.

公开(公告)号：US12062313B2

公开(公告)日：2024-08-13

申请号：US18296937

申请日：2023-04-06

Applicant: Apple Inc.

Inventor： Jie Won Ryu ,  Kingsuk Brahma ,  Qing Li ,  Shawn P Hurley ,  Ce Zhang ,  Warren S Rieutort-Louis ,  Feng Wen ,  Marc J DeVincentis ,  Zhe Hua ,  Hyunwoo Nho

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0435

Abstract: This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.