公开(公告)号：US20240332319A1

公开(公告)日：2024-10-03

申请号：US18613001

申请日：2024-03-21

Applicant: Apple Inc.

Inventor： Gihoon Choo ,  Abbas Jamshidi Roudbari ,  Guanxiong Liu ,  Jae Won Choi ,  Kyounghwan Kim ,  Shyuan Yang ,  Sungki Lee ,  Ting-Kuo Chang ,  Tsung-Ting Tsai ,  Wan-Ching Hsu ,  Warren S Rieutort-Louis ,  Yishan Liu ,  Zhe Hua

IPC: H01L27/12 ,  H01L25/16 ,  H01L25/18 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L27/1248 ,  H01L25/167 ,  H01L25/18 ,  H01L27/1259 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L27/124 ,  H01L2224/16145 ,  H01L2224/32227 ,  H01L2224/73203 ,  H01L2924/1426

Abstract: An electronic device may include a substrate, an array of display pixels formed on the substrate, first conductive contacts on the substrate, second conductive contacts on the substrate, a flexible printed circuit that is attached to the first conductive contacts, a display driver integrated circuit that is attached to the second conductive contacts, and conductive traces that electrically connect the first conductive contacts to the second conductive contacts. A dielectric layer may cover at least the sidewalls of the conductive traces to protect the conductive traces from damage by an etchant. Subsequently, some or all of the dielectric layer may be removed to prevent damage caused by moisture ingress into the cladding layer.

公开(公告)号：US20240013693A1

公开(公告)日：2024-01-11

申请号：US18296937

申请日：2023-04-06

Applicant: Apple Inc.

Inventor： Jie Won Ryu ,  Kingsuk Brahma ,  Qing Li ,  Shawn P. Hurley ,  Ce Zhang ,  Warren S Rieutort-Louis ,  Feng Wen ,  Marc J. DeVincentis ,  Zhe Hua ,  Hyunwoo Nho

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2340/0435 ,  G09G2310/08 ,  G09G2330/021

Abstract: This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.

公开(公告)号：US12062313B2

公开(公告)日：2024-08-13

申请号：US18296937

申请日：2023-04-06

Applicant: Apple Inc.

Inventor： Jie Won Ryu ,  Kingsuk Brahma ,  Qing Li ,  Shawn P Hurley ,  Ce Zhang ,  Warren S Rieutort-Louis ,  Feng Wen ,  Marc J DeVincentis ,  Zhe Hua ,  Hyunwoo Nho

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0435

Abstract: This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.

公开(公告)号：US20240013692A1

公开(公告)日：2024-01-11

申请号：US18212710

申请日：2023-06-21

Applicant: Apple Inc.

Inventor： Jie Won Ryu ,  Ardra Singh ,  Arthur L. Spence ,  Christopher P. Tann ,  Chun Lu ,  Daniel J. Drusch ,  Hyunwoo Nho ,  Jongyup Lim ,  Kingsuk Brahma ,  Marc J. DeVincentis ,  Mohammad Ali Jangda ,  Paolo Sacchetto ,  Peter F. Holland ,  Shawn P. Hurley ,  Wei H. Yao ,  Yue Jack Chu ,  Zhe Hua

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2330/021 ,  G09G2360/16 ,  G09G2320/103

Abstract: To reduce overall power consumption for an electronic display power management integrated circuit (PMIC), one of multiple electric power converters and/or electric power regulators may be selected based on an electrical load (e.g., due to the total brightness of the content displayed) on the electronic display at a given moment. In some embodiments, the PMIC may include a less efficient heavy load converter designed with high-current handling capability and a more efficient light load (e.g., low current) converter with lower current handling capability. A controller may dynamically select between the converters depending on a present load or an expected load on the electronic display.

公开(公告)号：US20230197020A1

公开(公告)日：2023-06-22

申请号：US17988721

申请日：2022-11-16

Applicant: Apple Inc.

Inventor： Shengkui Gao ,  Jie Won Ryu ,  Kingsuk Brahma ,  Marc J DeVincentis ,  Mohammad Ali Jangda ,  Paolo Sacchetto ,  Weijun Yao ,  Yafei Bi ,  Yang Xu ,  Yue Jack Chu ,  Zhe Hua

IPC: G09G3/34 ,  G09G3/36

CPC classification number: G09G3/3426 ,  G09G3/3611 ,  G09G2330/021 ,  G09G2360/16

Abstract: This disclosure provide various techniques for tracking emission profiles on an electronic display. An emission profile may be applied to the electronic display in order to illuminate certain pixels and deactivate (e.g., turn off) certain pixels in the electronic display to facilitate refreshing (e.g., programming with new image data) the deactivated pixels. A real-time row-based average pixel level or average pixel luminance calculation architecture may track the one or more EM profiles to accurately model EM profile behavior, which may enable accurate calculation of the average pixel level or average pixel luminance of the electronic display at any one point in time. The accurate average pixel level or average pixel luminance calculations effectuated by the EM profile tracking may be used to reduce the IR drop, improve real-time peak-luminance control, and improve the performance of under-display sensors, among other advantages.