公开(公告)号：US5914276A

公开(公告)日：1999-06-22

申请号：US885336

申请日：1997-06-30

Applicant: Hwa-sook Shin ,  Kyeong-koo Chi

Inventor： Hwa-sook Shin ,  Kyeong-koo Chi

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/768 ,  H01L29/78 ,  H01L21/00

CPC classification number: H01L21/76885 ,  H01L21/32136

Abstract: Methods of forming electrically conductive lines include the steps of forming a first electrically insulating layer (e.g., SiO.sub.2) on a face of a semiconductor substrate and then forming a layer of polycrystalline silicon (polysilicon) as a blanket layer on the first electrically insulating layer. A metal silicide layer (e.g., TiSix) is then formed on the polysilicon layer by reacting the polysilicon layer with an appropriate metal such as titanium (Ti) using a thermal treatment step. Thereafter, a second electrically insulating layer (e.g., SiO.sub.2, Si.sub.3 N.sub.4) is formed on the metal silicide layer using conventional techniques. A layer of photoresist is then deposited onto the second electrically insulating layer and patterned as an etching mask using conventional photolithographic processing steps. The second electrically insulating layer, metal silicide layer and polysilicon layers are then sequentially etched to define a plurality of spaced conductive lines which each comprise a composite of a polysilicon layer and metal silicide layer thereon. Preferably, the metal silicide layer and the polysilicon layer are sequentially dry etched by exposing these layers to a composite gas containing Cl.sub.2 and N.sub.2 gases which are provided at preferred volumetric flow rates and temperatures greater than 23.degree. C. (i.e., room temperature) so that the amount of polymer residue generated during the etching step is sufficient to protect the interface between the metal silicide layer and the polysilicon layer from lateral overetching but not so excessive as to prevent complete removal of those portions of the metal silicide and polysilicon layers exposed by the openings in the patterned layer of photoresist.

Abstract translation: 形成导电线的方法包括以下步骤：在半导体衬底的表面上形成第一电绝缘层（例如SiO 2），然后在第一电绝缘层上形成作为覆盖层的多晶硅层（多晶硅）层。 然后通过使用热处理步骤使多晶硅层与合适的金属如钛（Ti）反应，在多晶硅层上形成金属硅化物层（例如TiSix）。 此后，使用常规技术在金属硅化物层上形成第二电绝缘层（例如SiO 2，Si 3 N 4）。 然后将一层光致抗蚀剂沉积到第二电绝缘层上，并使用常规光刻处理步骤将其图案化为蚀刻掩模。 然后依次蚀刻第二电绝缘层，金属硅化物层和多晶硅层以限定多个间隔开的导电线，每条导线包括其上的多晶硅层和金属硅化物层的复合物。 优选地，金属硅化物层和多晶硅层通过将这些层暴露于含有Cl 2和N 2气体的复合气体而被顺序地干蚀刻，所述气体以优选的体积流量和大于23℃（即室温）的温度提供，因此 在蚀刻步骤期间产生的聚合物残余物的量足以保护金属硅化物层和多晶硅层之间的界面免受横向过蚀刻，但不能过度，以防止完全去除由金属硅化物和多晶硅层暴露的金属硅化物和多晶硅层的那些部分 光致抗蚀剂图案化层中的开口。

公开(公告)号：US5903351A

公开(公告)日：1999-05-11

申请号：US946168

申请日：1997-10-07

Applicant: Sang Sup Jeong ,  Kyeong Koo Chi ,  Chan Ouk Jung

Inventor： Sang Sup Jeong ,  Kyeong Koo Chi ,  Chan Ouk Jung

IPC: H01L21/18 ,  G01N21/25 ,  H01L21/31 ,  G01B9/02

CPC classification number: G01N21/255

Abstract: A spectroscopic analyzing method and apparatus for a wafer surface and gas phase elements in a reaction chamber. A beam of radiant energy is introduced from a light incident apparatus to the reaction chamber through a window on a wall of the reaction chamber at a predetermined, but variable, angle of incidence. The angle of incidence is set by adjusting optical elements in the light incident apparatus and an angle of the window. At one angle of incidence, the beam of radiant energy is caused to interact with gas-phase elements in the reaction chamber for spectroscopic analysis. At another angle of incidence, the beam of radiant energy is caused to interact with the wafer surface for spectroscopic analysis.

Abstract translation: 用于反应室中晶片表面和气相元件的光谱分析方法和装置。 辐射能束从光入射装置通过反应室壁上的窗口以预定但可变的入射角被引入反应室。 通过调整光入射装置中的光学元件和窗口的角度来设定入射角。 在一个入射角处，使辐射能束与反应室中的气相元素相互作用，用于光谱分析。 在另一个入射角处，使辐射能束与晶片表面相互作用进行光谱分析。

公开(公告)号：US5808733A

公开(公告)日：1998-09-15

申请号：US740670

申请日：1997-02-24

Applicant: Kyeong-koo Chi

Inventor： Kyeong-koo Chi

IPC: G01N21/68 ,  G01J1/00 ,  G01J1/04 ,  G01N21/71 ,  G01N21/73 ,  H01L21/00 ,  H01L21/302 ,  H01L21/3065 ,  H01S3/00 ,  H01S3/08 ,  G01J1/44

CPC classification number: H01L21/67253 ,  H01J37/32935

Abstract: In a device for measuring feeble light and a method thereof, the device includes a feeble light amplifying device having a reaction chamber with two transparent windows as a constituent part, a detector, and two mirrors. The feeble light generated in the reaction chamber in which an etching process is in progress is amplified by the mirrors and is then detected, whereby an etching endpoint can be accurately determined. Therefore, the damage to semiconductors due to overetching or underetching can be prevented.

Abstract translation: 在用于测量微弱光的装置及其方法中，该装置包括具有两个透明窗口作为组成部分的反应室的微弱光放大装置，检测器和两个反射镜。 在其中进行蚀刻处理的反应室中产生的微弱光被反射镜放大，然后被检测，从而可以准确地确定蚀刻终点。 因此，可以防止由于过蚀刻或未蚀刻引起的半导体损坏。

公开(公告)号：US5772772A

公开(公告)日：1998-06-30

申请号：US698362

申请日：1996-08-15

Applicant: Kyeong-koo Chi

Inventor： Kyeong-koo Chi

IPC: C23F4/00 ,  H01J37/32 ,  H01L21/00 ,  H01L21/223 ,  H01L21/302 ,  H01L21/3065 ,  H05H1/02 ,  C23C16/00

CPC classification number: H01J37/32623 ,  H01J37/32688

Abstract: A plasma diffusion control apparatus is provided with a plurality of wires through which current flows in parallel so that lines of magnetic force are generated in a direction parallel to the plasma wall of the diffusion chamber wall. It is preferable that the wires are located in the neighborhood of the diffusion chamber at equal intervals, and arranged so that the direction of the magnetic field generated by wires are parallel to the direction of movement of the plasma. Since the magnetic field is formed in a direction parallel to the inner wall of the diffusion chamber, it is possible to prevent the diffusion of the plasma to the chamber wall. As a result there is no region which is influenced by strong local magnetic fields perpendicular to the plasma chamber wall, so that it is possible to solve the problems caused by substantial amounts of polymer deposition on the inner wall of the plasma diffusion chamber.