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公开(公告)号：US4737737A
公开(公告)日：1988-04-12
申请号：US888565
申请日：1986-07-22
申请人： Amarpal S. Khanna
发明人： Amarpal S. Khanna
CPC分类号： H03L7/24 , H03B5/187 , H03L7/26 , H03B2201/017 , H03B5/1847
摘要： A dielectric resonator oscillator utilizing transmission-type injection-locking for frequency stabilization is disclosed as including a transistor, two microstrip lines, and a dielectric resonator. One microstrip line is coupled to the transistor, while the other microstrip line receives the broadband signal. The dielectric resonator is positioned adjacent to and between the first and second microstrip lines and is operable for coupling an injection-locking signal into the transistor for locking the oscillation frequency of the oscillator. The two microstrip lines are preferably oriented at right angles so that various sizes of the dielectric resonator can be accommodated.
摘要翻译： 公开了一种使用用于频率稳定的透射型注入锁定的介质谐振器振荡器，包括晶体管，两条微带线和介质谐振器。 一个微带线耦合到晶体管，而另一个微带线接收宽带信号。 介质谐振器位于第一和第二微带线之间并且位于第一和第二微带线之间，并且可操作用于将注入锁定信号耦合到晶体管中以锁定振荡器的振荡频率。 两个微带线优选地以直角定向，从而可以容纳各种尺寸的介质谐振器。
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72.发明授权RF oscillator frequency stabilizing circuit using self-mixing with reference frequency 失效RF振荡器频率稳定电路采用自参与频率混合
公开(公告)号：US4634999A
公开(公告)日：1987-01-06
申请号：US739694
申请日：1985-05-31
申请人： Robin M. Braun
发明人： Robin M. Braun
CPC分类号： H03L7/04
摘要： A frequency stable RF oscillator 10 comprises a variable frequency RF source in the form of a microwave cavity 24 having a Gunn diode 26 and a varactor 28 mounted therein, and produces an RF output frequency f.sub.o. The output of a frequency stable reference oscillator 14 having a frequency f.sub.r is impressed upon the RF source. Through self-mixing action of the Gunn diode, an IF whose frequency is f.sub.IF =.vertline.nf.sub.r -f.sub.o .vertline. is generated, n being a high harmonic number. The IF is detected by an IF amplifier 18 which forms part of a frequency lock loop controlling the frequency of the RF source.
摘要翻译： 频率稳定的RF振荡器10包括微波空腔24形式的可变频率RF源，其具有安装在其中的耿氏二极管26和变容二极管28，并产生RF输出频率fo。 具有频率fr的频率稳定基准振荡器14的输出施加在RF源上。 通过Gunn二极管的自混合动作，产生频率为fIF = | nfr-fo|的IF，n为高谐波数。 IF由IF放大器18检测，IF放大器18形成控制RF源的频率的频率锁定环的一部分。
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公开(公告)号：US4575688A
公开(公告)日：1986-03-11
申请号：US726668
申请日：1985-04-24
申请人： Alan D. Whitefoot
发明人： Alan D. Whitefoot
CPC分类号： H03L7/24
摘要： The output signal frequencies of two current controlled oscillators are made to track closely by matching timing currents with a current mirror. A frequency difference between the output signals is obtained by establishing an additional timing current for only one of said oscillators.
摘要翻译： 两个电流控制振荡器的输出信号频率通过将定时电流与电流镜相匹配来进行跟踪。 通过仅为所述振荡器之一建立额外的定时电流来获得输出信号之间的频率差。
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公开(公告)号：US4463321A
公开(公告)日：1984-07-31
申请号：US335148
申请日：1981-12-28
申请人： Jimmy M. Horner
发明人： Jimmy M. Horner
CPC分类号： H03L7/02
摘要： A frequency synthesizer having a delay line for a controlling element. The output frequency of a voltage controlled oscillator (VCO) is sampled with a directional coupler and input to an in-phase power divider. The first output of the power divider is input to a delay line to provide a delayed signal. The delayed signal and the non-delayed signal from the second output of the power divider are input to a phase detector. The output of the phase detector is a DC voltage representative of the phase difference between the delayed signal and the non-delayed signal. An analog gate inputs the phase detector output to an oscillator driver that controls the VCO. When the phase difference deviates from a predetermined level the oscillator driver outputs an error voltage to adjust the VCO until the proper phase difference is achieved which will be a condition of phase lock wherein the output frequency is phase locked to the delay line. The predetermined phase difference is determined by the delay of the delay line and the characteristics of the phase detector. A digital-to-analog converter also controls the oscillator driver providing a coarse tuning control for entering new frequency data. A strobe signal will open the analog gate, thus disconnecting the phase detector, when new frequency data is input. When the analog gate is closed the frequency synthesizer will again seek a phase lock condition.
摘要翻译： 一种具有用于控制元件的延迟线的频率合成器。 压控振荡器（VCO）的输出频率用定向耦合器进行采样，并输入到同相功率分配器。 功率分配器的第一输出被输入到延迟线以提供延迟信号。 来自功率分配器的第二输出的延迟信号和非延迟信号被输入到相位检测器。 相位检测器的输出是表示延迟信号和非延迟信号之间的相位差的直流电压。 模拟门将相位检测器输出输入到控制VCO的振荡器驱动器。 当相位差偏离预定电平时，振荡器驱动器输出误差电压以调整VCO，直到达到适当的相位差，这将是相位锁定的条件，其中输出频率被锁相到延迟线。 预定的相位差由延迟线的延迟和相位检测器的特性确定。 数模转换器还控制振荡器驱动器，为输入新的频率数据提供粗调谐控制。 当输入新的频率数据时，选通信号将打开模拟门，从而断开相位检测器。 当模拟门关闭时，频率合成器将再次寻求锁相条件。
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公开(公告)号：US4274067A
公开(公告)日：1981-06-16
申请号：US79653
申请日：1979-09-27
申请人： Vasil Uzunoglu
发明人： Vasil Uzunoglu
CPC分类号： H03L7/24 , H04L7/027 , H04L7/0083
摘要： A clock recovery network uses a voltage proportional to the incoming symbol rate as a coarse tuning signal to control the tuned center frequency of a voltage controlled oscillator. The incoming data is used to positively synchronize the oscillator to the incoming data stream.
摘要翻译： 时钟恢复网络使用与输入符号率成比例的电压作为粗调信号来控制压控振荡器的调谐中心频率。 输入数据用于将振荡器正确地同步到输入数据流。
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公开(公告)号：US4206421A
公开(公告)日：1980-06-03
申请号：US973436
申请日：1978-12-26
申请人： Horst Bernhard , Helmut Junghans , Gerd Ortkrass , Klaus Vogel
发明人： Horst Bernhard , Helmut Junghans , Gerd Ortkrass , Klaus Vogel
摘要： A system is disclosed for synchronizing a free-swinging oscillator to a reference signal of a substantially lower frequency. A regulating circuit connects to the oscillator to control the frequency thereof. A quartz oscillator is provided for producing the reference signal. The reference signal is subsequently connected to a frequency multiplier and/or frequency divider, an amplifier and a pass band filter. An output signal from the pass band filter is fed to a harmonics mixer connected to the free-swinging oscillator and which produces a pattern of harmonics. A selective amplifier feeds an intermediate frequency obtained from the harmonics mixer to the regulator circuit. A filter also connected to the quartz oscillator produces harmonics which are also coupled to the regulating circuit. By phase or frequency comparison the regulating circuit adjusts the running frequency of the free-swinging oscillator.
摘要翻译： 公开了一种用于使自由摆动振荡器与基本上较低频率的参考信号同步的系统。 调节电路连接到振荡器以控制其频率。 提供石英振荡器用于产生参考信号。 参考信号随后连接到倍频器和/或分频器，放大器和通带滤波器。 来自通带滤波器的输出信号被馈送到连接到自由摆动振荡器并且产生谐波模式的谐波混频器。 选择性放大器将从谐波混频器获得的中频馈送到调节器电路。 也连接到石英振荡器的滤波器产生也耦合到调节电路的谐波。 通过相位或频率比较，调节电路调节自由摆动振荡器的运行频率。
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77.发明授权Circuit for synchronizing the oscillation of an oscillator keyed by a pulse, with a reference oscillation 失效用于使由脉冲键控的振荡器的振荡与参考振荡同步的电路
公开(公告)号：US4123726A
公开(公告)日：1978-10-31
申请号：US833488
申请日：1977-09-15
申请人： Peter Schucht
发明人： Peter Schucht
CPC分类号： H03B5/1847 , H03L7/083 , H03L7/14 , H03L7/24 , H03B2200/004 , H03B2201/0208
摘要： A circuit for synchronizing an oscillator keyed by a pulse is provided with a low amplitude reference oscillation. A phase shift regulating loop has a phase discriminator which is fed, on one hand, with a branched component of the oscillator output and, on the other hand, with the reference oscillation. The phase discriminator compares the phases of the two oscillators and emits a resultant regulating voltage an adjustable reactance for controlling the oscillator frequency during the leading edge of the keying pulse. A phase shift device, adjustable over 180.degree., is connected between the oscillator and the phase discriminator, the phase discriminator having a high-ohmic output which is connected, via an impedance converter, to the adjustable reactance. A sampling switch is interposed between the impedance converter and the adjustable reactance, the switch being closed at the beginning of a pulse and opened shortly before the end of a pulse, the pulses being of predetermined duration, and a holding circuit holds the regulating voltage at least to an approximate value across the adjustable reactance prior to the end of a pulse, until the closing of the sampling switch.
摘要翻译： 用于使由脉冲键控的振荡器同步的电路具有低振幅参考振荡。 相移调节回路具有相位鉴别器，一方面以振荡器输出的分支分量馈送，另一方面馈送参考振荡。 相位鉴相器比较两个振荡器的相位，并发出合成的调节电压，用于在键控脉冲的前沿期间控制振荡器频率的可调电抗。 在振荡器和鉴相器之间连接了可调节180°以上的相移装置，相位鉴别器具有通过阻抗转换器连接到可调谐电抗的高欧姆输出。 采样开关插在阻抗转换器和可调电抗之间，开关在脉冲开始时闭合，并在脉冲结束之前不久开启，脉冲具有预定的持续时间，并且保持电路将调节电压保持在 最小到在脉冲结束之前的可调电抗的近似值，直到采样开关闭合为止。
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78.发明授权
公开(公告)号：US3832652A
公开(公告)日：1974-08-27
申请号：US32507273
申请日：1973-01-19
申请人： RCA CORP
发明人： UPADHYAYULA C , NARAYAN S
摘要： A circuit is presented which has the capability of dividing an input frequency by an integer in order to achieve an output frequency within a specified range. This dynamic dividing circuit is capable of multi-gigabit rate operation.
摘要翻译： 提出了具有将输入频率除以整数的能力的电路，以便实现在指定范围内的输出频率。 这种动态分频电路能够进行多千兆比特率的操作。
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公开(公告)号：US3824485A
公开(公告)日：1974-07-16
申请号：US35536873
申请日：1973-04-30
申请人： SPERRY RAND CORP
CPC分类号： H03L7/24
摘要： A stable low-noise high frequency signal source comprises a primary high frequency generator stabilized by a high-qualityfactor transmission resonator, the primary generator output also being injection phase locked by a stable secondary high frequency quartz crystal controlled generator.
摘要翻译： 稳定的低噪声高频信号源包括由高品质因子传输谐振器稳定的初级高频发生器，主发生器输出也由稳定的次级高频石英晶体控制发生器注入锁相。
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公开(公告)号：US3573651A
公开(公告)日：1971-04-06
申请号：US3573651D
申请日：1968-12-11
发明人： ENGELBRECHT RUDOLF S
CPC分类号： H03L7/24
摘要： A locked oscillator system is composed of a series array of modules each containing a unit oscillator in parallel with a bypass conductor and coupling means including a particularly adjusted phase shifter. Adjustment of the phase shifter in each module establishes the proportion of power that is directed to the unit oscillator device rather than to the bypass conductor of the next module. By appropriate adjustment of the phase shifters, equal synchronizing power is applied to each unit oscillator, and the remainder of the output power is applied directly to the load.
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