公开(公告)号：US07373573B2

公开(公告)日：2008-05-13

申请号：US11146988

申请日：2005-06-06

Applicant: Mack Wayne Riley

Inventor： Mack Wayne Riley

IPC: G01R31/28 ,  G11C21/00

CPC classification number: G11C29/44 ,  G11C29/72 ,  G11C29/789 ,  G11C29/802 ,  G11C2029/1208 ,  G11C2029/4402

Abstract: An apparatus and method for using a single bank of electric fuses (eFuses) to successively store test data derived from multiple stages of testing are provided. To encode and store array redundancy data from each subsequent test in the same bank of eFuses, a latch on a scan chain is used that holds the programming information for each eFuse. This latch allows for programming only a portion of eFuses during each stage of testing. Moreover, the data programmed in the eFuses can be sensed and read as part of a scan chain. Thus, it can be easily determined what portions of the bank of eFuses have already been programmed by a previous stage of testing and where to start programming the next set of data into the bank of eFuses. As a result, the single bank of eFuses stores multiple sets of data from a plurality of test stages.

Abstract translation: 提供了使用单组电熔丝（eFuses）连续存储从多个测试阶段得到的测试数据的装置和方法。 为了在同一组eFuses组中对每个后续测试中的阵列冗余数据进行编码和存储，使用扫描链上的锁存器来保存每个eFuse的编程信息。 该锁存器允许在每个测试阶段只编程一部分eFuses。 此外，eFuses中编程的数据可以作为扫描链的一部分进行检测和读取。 因此，可以很容易地确定电子货币银行的哪些部分已经由先前的测试阶段编程，以及在哪里开始将下一组数据编程到eFuses库中。 结果，单组eFuses存储来自多个测试阶段的多组数据。

公开(公告)号：US06917739B2

公开(公告)日：2005-07-12

申请号：US10401827

申请日：2003-03-27

Applicant: Datong Chen

Inventor： Datong Chen

IPC: G02F3/00 ,  G02B6/28 ,  G06E3/00 ,  G11C21/00 ,  H04B10/00 ,  H04Q11/00 ,  G02B6/42

CPC classification number: G06E3/00 ,  G02B6/2861 ,  H04Q11/0005 ,  H04Q2011/002

Abstract: An optical memory having an input port for receiving an input optical signal to be stored in the optical memory is disclosed. A portion of the optical signal is coupled to a storage loop for storing optical signals by a coupler that transfers a portion of the input optical signal to the storage loop. An optical signal stored in the storage loop is output by coupling a portion of that optical signal to a first external optical waveguide. The storage loop includes a semiconductor optical amplifier for amplifying the signals stored in the storage loop to compensate for losses incurred by those signals in traversing the storage loop. A plurality of such optical memories can be combined to form a larger memory that includes a reconditioning circuit that resets the amplitude of the optical signals to a value that depends on the amplitude of the optical signals.

Abstract translation: 公开了具有用于接收要存储在光存储器中的输入光信号的输入端口的光存储器。 光信号的一部分耦合到存储环路，用于通过将输入光信号的一部分传送到存储环路的耦合器存储光信号。 通过将该光信号的一部分耦合到第一外部光波导来输出存储在存储环路中的光信号。 存储环路包括用于放大存储在存储环路中的信号的半导体光放大器，以补偿这些信号在穿过存储环路时引起的损耗。 可以组合多个这样的光存储器以形成更大的存储器，其包括将光信号的幅度重置为取决于光信号的幅度的值的修复电路。

公开(公告)号：US6035081A

公开(公告)日：2000-03-07

申请号：US904836

申请日：1997-08-01

Applicant: Alistair James Poustie ,  Keith James Blow ,  Robert John Manning

Inventor： Alistair James Poustie ,  Keith James Blow ,  Robert John Manning

IPC: G02F3/00 ,  G11C21/00 ,  G02B6/28

CPC classification number: G11C21/00 ,  G02F3/00

Abstract: A regenerative optical memory comprising a number of concatenated non-linear switching elements coupled by an optical storage element has a transfer function arranged so that only optical data having a pulse amplitude above a predetermined threshold is stored and the amplitude of optical data stored is substantially equalised to at least one predetermined level after a number of circulations within the optical memory. In a preferred embodiment, the optical memory is provided with an optical switching element within the optical loop for selectively switching at least a portion of the data pattern out of the optical loop in response to the application of an optical signal to an input of the optical switching element to alter the contents of the memory.

Abstract translation: 包括由光存储元件耦合的多个级联非线性开关元件的再生光学存储器具有布置为仅存储具有高于预定阈值的脉冲幅度的光学数据并且存储的光学数据的幅度基本相等的传递函数 在光学存储器中的多个循环之后至少一个预定水平。 在优选实施例中，光学存储器在光学环路内设置有光学开关元件，用于响应于将光信号应用于光学信号的输入而选择性地将光学环路中的数据模式的至少一部分切换出光环路 切换元件来改变内存的内容。

公开(公告)号：US5270981A

公开(公告)日：1993-12-14

申请号：US664477

申请日：1991-03-04

Applicant: Masahiko Sumi

Inventor： Masahiko Sumi

IPC: G06F5/16 ,  G06F7/78 ,  G11C8/04 ,  G11C19/00 ,  G11C21/00

CPC classification number: G06F7/785 ,  G06F5/16 ,  G11C8/04

Abstract: A memory device having an addressing unit for addressing different values as addresses for input/output of data for each clock input during one cycle, and a memory inputting data at different designated addresses and cyclically outputting stored data. The memory device provides the operation of a shift register which is capable of determining the number of stages in accordance with the content of the addressing. By employing a memory which effects read-modify-write operations and by delivering input data obtained by the feedback of output data to this memory, the memory device can repeatedly output the same data. The memory device has a switch circuit operative in a first position for connecting an output of the memory to an input of the memory and in a second position for connecting the input of the memory to an external data source.

Abstract translation: 一种存储器件，具有寻址单元，用于在一个周期期间针对每个时钟输入的数据的输入/输出地址不同的值进行寻址，以及存储器输入不同指定地址的数据并循环地输出存储的数据。 存储器件提供移位寄存器的操作，该移位寄存器能够根据寻址的内容来确定级数。 通过采用影响读取修改 - 写入操作的存储器，并且通过将输出数据的反馈获得的输入数据传送到该存储器，存储器件可以重复地输出相同的数据。 该存储器件具有一个开关电路，其工作在第一位置，用于将存储器的输出连接到存储器的输入端，以及用于将存储器的输入连接到外部数据源的第二位置。

公开(公告)号：US4961621A

公开(公告)日：1990-10-09

申请号：US288583

申请日：1988-12-22

Applicant: Shing-Fong Su

Inventor： Shing-Fong Su

IPC: G02B6/28 ,  G11C19/00 ,  G11C19/38 ,  G11C21/00

CPC classification number: G11C19/00 ,  G02B6/28 ,  G02B6/2821 ,  G11C19/38 ,  G11C21/00

Abstract: An optical parallel-to-serial converter constructed from at least two optical shift registers coupled in cascade by an optical two-to-one combiner. The input port of the first optical shift register serves as one input to the parallel-to-serial converter, an extra optical combiner optically coupled to the last of said optical shift registers serves as one input port, while the optical combiners coupling said optical shift registers serve as the other input ports receiving parallel optical pulses. The output port of the last of said cascaded optical shift registers serves as the output port of the parallel-to-serial converter. The shift registers are controlled by two clocks, operating at the same rate, but each out of phase with the other, providing control signals to shift and output said optical pulses serially from said shift registers to effect a parallel-to-serial conversion.

Abstract translation: 一种光学并行到串行转换器，由至少两个光学移位寄存器构成，该移位寄存器由光学二对一组合器级联耦合。 第一光移位寄存器的输入端口用作并行到串行转换器的一个输入端，光耦合到最后的所述光移位寄存器的额外的光组合器用作一个输入端口，而组合器耦合所述光移位 寄存器用作接收并行光脉冲的其他输入端口。 最后一个级联光移位寄存器的输出端口用作并行到串行转换器的输出端口。 移位寄存器由两个时钟控制，工作速度相同，但每个时钟与另一个时钟异相，提供控制信号，从所述移位寄存器串行地移位和输出所述光脉冲，以实现并行到串行转换。

公开(公告)号：US4856862A

公开(公告)日：1989-08-15

申请号：US185103

申请日：1988-04-22

Applicant: Charles G. Passmore ,  Robert D. Mowry ,  Alan G. Brown

Inventor： Charles G. Passmore ,  Robert D. Mowry ,  Alan G. Brown

IPC: G02B6/28 ,  G02B6/44 ,  G06E1/02 ,  G11C21/00

CPC classification number: G11C21/00 ,  G02B6/2861 ,  G02B6/4457 ,  G06E1/02

Abstract: A storage system based on the propagation delay of light is disclosed which utilizes an array of fiber optics to store the information. The storage device is configured as two loops. Data is injected from one loop and data is continuously recirculated for storage in the other loop. A pulsed laser provides the clocked energy source and is split for use, both, in recirculating the data, and for new data injection. Multiple channels of light are extracted by using a diffraction grating. The source may be interrupted to erase data in the recirculating memory. Recirculation takes place over a single strand fiber optics coil of any length. Multiple frequency encoded channels of data are multiplexed into the single strand of fiber optic with an integrating lens and the channels are decoupled on the other end with a diffraction grating. To prevent compounding signal degradation, optical switches are used to regenerate the signal at each pass through the loop. A beam splitter in the recirculating loop provides for data extraction through the use of a photosensor array. Data is injected into the recirculating loop by pulsing in light using electro-optical shutters. The device is useful for data storage in optical and digital computing. The device may also be used as a platform for recursive optical computing by the placement of optical computing components within the recirculating memory loop.

Abstract translation: 公开了一种基于光的传播延迟的存储系统，其利用光纤阵列来存储信息。 存储设备配置为两个循环。 数据从一个循环注入，数据被连续再循环以存储在另一个循环中。 脉冲激光器提供了时钟能量源，并且被分开用于在再循环数据和新数据注入中使用。 通过使用衍射光栅提取多个光通道。 源可能被中断以擦除再循环存储器中的数据。 在任何长度的单股光纤线圈上进行再循环。 数据的多频编码通道用积分透镜复用到单根光纤中，并且通道在另一端用衍射光栅去耦。 为了防止复合信号劣化，光开关用于在每次通过环路时再生信号。 再循环回路中的分束器通过使用光电传感器阵列提供数据提取。 数据通过使用电光快门的光脉冲注入循环回路。 该设备对光学和数字计算中的数据存储非常有用。 该装置还可以用作通过在循环存储器环路内放置光学计算部件来进行递归光学计算的平台。

公开(公告)号：US4815804A

公开(公告)日：1989-03-28

申请号：US123123

申请日：1987-11-20

Applicant: Emmanuel Desurvire ,  Michel J. F. Digonnet ,  H. J. Shaw

Inventor： Emmanuel Desurvire ,  Michel J. F. Digonnet ,  H. J. Shaw

IPC: G02B6/28 ,  H01S3/00 ,  H01S3/30 ,  G02B6/26 ,  G11C21/00 ,  H04B9/00

CPC classification number: H01S3/0057 ,  G02B6/2861 ,  H01S3/302 ,  G02F2203/54 ,  H01S2301/08 ,  Y10S359/90

Abstract: A fiber optic recirculating memory comprises a splice-free length of optical fiber which forms a loop that is optically closed by means of a fiber optic coupler. The coupler couples an optical signal input pulse to the loop for circulation therein, and outputs a portion of the signal pulse on each circulation to provide a series of output pulses. A pump source is included to pump the fiber loop with a pump signal having sufficient intensity to cause stimulated Raman scattering in the fiber loop, and thereby cause amplification of the circulating signal pulse. The fiber characteristics, coupler characteristics, and pump power are selected to yield a Raman gain which compensates for the total round-trip losses in the fiber loop, so as to provide an output pulse train of constant amplitude pulses. The invention may be implemented utilizing either a standard coupler or a multiplexing coupler. The multiplexing coupler advantageously permits independent selection of the coupling ratios for the pump signal and signal pulse, thereby allowing these coupling ratios to be selected for minimum loop loss and maximum pumping efficiency.

Abstract translation: 光纤再循环存储器包括无接头长度的光纤，其形成通过光纤耦合器光闭合的环路。 耦合器将光信号输入脉冲耦合到环路以在其中循环，并且在每个循环上输出信号脉冲的一部分以提供一系列输出脉冲。 包括泵浦源以用具有足够强度的泵浦信号泵送光纤环，以在光纤回路中引起受激拉曼散射，从而引起循环信号脉冲的放大。 选择光纤特性，耦合器特性和泵浦功率以产生拉曼增益，其补偿光纤回路中的总往返损耗，从而提供恒定幅度脉冲的输出脉冲串。 本发明可以利用标准耦合器或复用耦合器来实现。 多路复用耦合器有利地允许独立地选择泵浦信号和信号脉冲的耦合比，从而允许选择这些耦合比以实现最小的环路损耗和最大的泵浦效率。

公开(公告)号：US4787065A

公开(公告)日：1988-11-22

申请号：US153526

申请日：1988-02-03

Applicant: Bahman Barazesh ,  Luc Mary

Inventor： Bahman Barazesh ,  Luc Mary

IPC: G06F7/544 ,  G06F9/355 ,  G06F12/00 ,  G06F12/02 ,  G06F17/10 ,  G11C8/04 ,  H03H17/00 ,  H03H17/04 ,  H03H21/00 ,  G11C7/00 ,  G11C21/00

CPC classification number: G06F9/3552 ,  G06F12/02 ,  G06F7/544 ,  G11C8/04

Abstract: A data processing apparatus in which a memory (10) is accessed at addresses stored in an address regiser (20). An incrementation circuit (38) successively increments or decrements the address stored in the principal register, under the control of an address cycling circuit (22). A pair of auxiliary registers (30, 35) respectively store the minimum and maximum address values to be reached in the principal register, and a comparison circuit (37) determines when the address therein matches the minimum or maximum value. The address cycling circuit, together with the comparison circuit, loads the principal register with the minimum address value when the address therein reaches the maximum value, the address therein thereafter being decremented, and loads it with the maximum address value when the address therein reaches the minimum value, the address therein thereafter being incremented. Such operation is particularly useful for preforming the functions of a fixed or adaptive transversal filter for data transmission, the data stored in the memory being the filter coefficients.

Abstract translation: 一种数据处理装置，其中在存储在地址注册器（20）中的地址处访问存储器（10）。 在地址循环电路（22）的控制下，递增电路（38）连续增加或减少存储在主寄存器中的地址。 一对辅助寄存器（30,35）分别存储主寄存器中要达到的最小和最大地址值，并且比较电路（37）确定何时其地址与最小值或最大值匹配。 地址循环电路与比较电路一起，当其中的地址达到最大值时，将主寄存器加载到最小地址值，其中之后的地址递减，并且当其中的地址达到最大地址值时，将其加载到最大地址值 最小值，其中之后的地址增加。 这种操作对于实现用于数据传输的固定或自适应横向滤波器的功能特别有用，存储在存储器中的数据是滤波器系数。

公开(公告)号：US4708421A

公开(公告)日：1987-11-24

申请号：US699853

申请日：1985-02-08

Applicant: Emmanuel Desurvire ,  Michel J. F. Digonnet ,  H. J. Shaw

Inventor： Emmanuel Desurvire ,  Michel J. F. Digonnet ,  H. J. Shaw

IPC: G11C21/00 ,  G02B6/00 ,  G02B6/28 ,  G02B6/287 ,  G02F1/35 ,  H01S3/00 ,  H01S3/30 ,  G02B5/172

CPC classification number: G02B6/2861 ,  H01S3/0057 ,  H01S3/302 ,  G02F2203/54 ,  H01S2301/08 ,  Y10S359/90

Abstract: A fiber optic recirculating memory comprises a splice-free length of optical fiber which forms a loop that is optically closed by means of a fiber optic coupler. The coupler couples an optical signal input pulse to the loop for circulation therein, and outputs a portion of the signal pulse on each circulation to provide a series of output pulses. A pump source is included to pump the fiber loop with a pump signal having sufficient intensity to cause stimulated Raman scattering in the fiber loop, and thereby cause amplification of the circulating signal pulse. The fiber characteristics, coupler characteristics, and pump power are selected to yield a Raman gain which compensates for the total round-trip losses in the fiber loop, so as to provide an output pulse train of constant amplitude pulses. The invention may be implemented utilizing either a standard coupler or a multiplexing coupler. The multiplexing coupler advantageously permits independent selection of the coupling ratios for the pump signal and signal pulse, thereby allowing these coupling ratios to be selected for minimum loop loss and maximum pumping efficiency.

Abstract translation: 光纤再循环存储器包括无接头长度的光纤，其形成通过光纤耦合器光闭合的环路。 耦合器将光信号输入脉冲耦合到环路以在其中循环，并且在每个循环上输出信号脉冲的一部分以提供一系列输出脉冲。 包括泵浦源以用具有足够强度的泵浦信号泵送光纤环，以在光纤回路中引起受激拉曼散射，从而引起循环信号脉冲的放大。 选择光纤特性，耦合器特性和泵浦功率以产生拉曼增益，其补偿光纤回路中的总往返损耗，从而提供恒定幅度脉冲的输出脉冲串。 本发明可以利用标准耦合器或复用耦合器来实现。 多路复用耦合器有利地允许独立地选择泵浦信号和信号脉冲的耦合比，从而允许选择这些耦合比以实现最小的环路损耗和最大的泵浦效率。

公开(公告)号：US4479701A

公开(公告)日：1984-10-30

申请号：US326215

申请日：1981-12-01

Applicant: Steven A. Newton ,  John E. Bowers ,  Herbert J. Shaw

Inventor： Steven A. Newton ,  John E. Bowers ,  Herbert J. Shaw

IPC: G11C21/00 ,  G01S7/285 ,  G02B6/00 ,  G02B6/28 ,  G02B5/172

CPC classification number: G02B6/29338 ,  G02B6/2821 ,  G02B6/2861 ,  G02B6/29332

Abstract: A fiber optic recirculating memory is disclosed which utilizes dual couplers to form a splice-free recirculating memory device from a length of single mode optical fiber forming a loop which acts as a delay line and a second length of single mode optical fiber which provides an input end and an output end for the device. A single signal supplied as an input to the device will result in a series of output signals identical to the input signal, although at smaller, decreasing amplitudes; the invention prevents the first output signal from being substantially larger than the rest of the output signals, thus eliminating the need for protective circuitry on the output end or the rejection of the first output signal. In addition to being useful as a recirculating memory device for use in a system where data is generated at a rate faster than it can be accepted by a data processor, the invention may be used as a tap filter to pass a selected fundamental frequency and its harmonics, and to attenuate all other frequencies.

Abstract translation: 公开了一种光纤再循环存储器，其利用双耦合器从一单一模式光纤的长度形成无拼接的循环存储器件，该单模光纤形成用作延迟线的环路和第二长度的单模光纤，其提供输入 端和输出端。 作为输入到设备的单个信号将产生与输入信号相同的一系列输出信号，尽管幅度较小，幅度较小。 本发明防止第一输出信号显着地大于其余的输出信号，从而消除了在输出端上对保护电路的需要或第一输出信号的抑制。 除了用作在数据以比数据处理器可以接受的速度更快的速度生成数据的系统中有用的本发明之外，本发明可以用作抽头滤波器以通过选定的基频，并且其 谐波，并衰减所有其他频率。