TIMING OSCILLATORS AND RELATED METHODS
    71.
    发明申请
    TIMING OSCILLATORS AND RELATED METHODS 审中-公开
    时序振荡器及相关方法

    公开(公告)号:US20120013413A1

    公开(公告)日:2012-01-19

    申请号:US13247318

    申请日:2011-09-28

    CPC classification number: H03L1/00 H03B5/30 H03L1/04 H03L7/16

    Abstract: Timing oscillators as well as related methods and devices are described. A timing oscillator may include a mechanical resonating structure with major elements and minor elements coupled to the major element. The timing oscillator can generate stable signals with low phase noise at very high frequencies which allows a timing oscillator to be used effectively in a number of devices including computers and mobile phones for time and data synchronization purposes. The signal generated by the timing oscillator can be tuned using a driver circuit and a compensation circuit.

    Abstract translation: 描述了定时振荡器以及相关方法和设备。 定时振荡器可以包括具有耦合到主要元件的主要元件和次要元件的机械谐振结构。 定时振荡器可以以非常高的频率产生具有低相位噪声的稳定信号,这允许定时振荡器在包括计算机和移动电话在内的多个设备中被有效地用于时间和数据同步目的。 由定时振荡器产生的信号可以使用驱动电路和补偿电路进行调谐。

    Varactor-free amplitude controlled oscillator(ACO) for system on chip and system on card Xtaless clock SOC
    72.
    发明授权
    Varactor-free amplitude controlled oscillator(ACO) for system on chip and system on card Xtaless clock SOC 有权
    无系统的幅度控制振荡器(ACO),用于片上系统和系统上的Xtaless时钟SOC

    公开(公告)号:US08089324B2

    公开(公告)日:2012-01-03

    申请号:US12317973

    申请日:2008-12-31

    Applicant: Min Ming Tarng

    Inventor: Min Ming Tarng

    Abstract: The fundamental breakthrough in green technology are the Varactor Free Amplitude Controlled Oscillator VFACO and the planar EMI-Free Planar Inductor. The VFACO makes the fine tune for oscillation frequency. It has the frequency compensation over temperature. It doesn't have the VCO self-modulation-induced phase noise. It is phase-noiseless. It is high-Q and high stability. It increases the communication capacity. The EMI-Free Planar Inductor is the backbone of the platform of green technology. The platform of green technology contains the Xtaless ClockChip, Inductorless PMU & PA and ESDS-PCB to provide the green technology for green chip design. Especially for the 4th generation wireless communication, the Inductorless PMU & PA are the most important green technology. The Xtaless ClockChip adopts the most advanced self-compensation Amplitude controller. The ESDS-PCB has the minimum Via assignment algorithm to make the optimum pin assignment for the platform of green technology. The self-compensation Amplitude controller is so powerful that the Xtaless ClockChip is trimless and/or trimfree Xtaless ClockChip. It is plastic-packageable and IP-able Xtaless ClockChip that it is the only market-ready-product Xtaless ClockChip.

    Abstract translation: 绿色技术的基本突破是无变幅自由振幅控制振荡器VFACO和平面无EMI平面电感器。 VFACO对振荡频率进行微调。 它具有温度范围内的频率补偿。 它没有VCO自调制引起的相位噪声。 它是相位无声的。 高Q高稳定性。 它增加了通信能力。 无EMI平面电感是绿色技术平台的骨干。 绿色技术平台包含Xtaless ClockChip,无电感PMU和PA和ESDS-PCB,为绿色芯片设计提供绿色技术。 特别是对于第四代无线通信,无电感PMU和PA是最重要的绿色技术。 Xtaless ClockChip采用最先进的自补偿幅度控制器。 ESDS-PCB具有最小的Via分配算法,可为绿色技术平台的最佳引脚分配。 自我补偿Amplitude控制器非常强大,Xtaless ClockChip是无偏差和/或免提的Xtaless ClockChip。 它是可塑性可封装和IP的Xtaless ClockChip,它是唯一的市场准备好的产品Xtaless ClockChip。

    METHODS AND APPARATUS FOR STABILIZING REFERENCE OSCILLATORS
    73.
    发明申请
    METHODS AND APPARATUS FOR STABILIZING REFERENCE OSCILLATORS 审中-公开
    用于稳定参考振荡器的方法和装置

    公开(公告)号:US20110212718A1

    公开(公告)日:2011-09-01

    申请号:US13036158

    申请日:2011-02-28

    CPC classification number: G01S19/235 H03J1/0083 H03J2200/12 H03L1/00 H03L7/16

    Abstract: Apparatus and methods for stabilizing reference oscillators are described. According to some embodiments, the reference oscillator of a device may be stabilized by synchronizing the reference oscillator to an external signal received by the device. The device may be a navigation device in some embodiments, and the external signal may represent or be synchronized to an atomic clock signal or other signal exhibiting sufficient stability.

    Abstract translation: 描述用于稳定参考振荡器的装置和方法。 根据一些实施例,可以通过将参考振荡器与由器件接收的外部信号同步来使器件的参考振荡器稳定。 在一些实施例中,该设备可以是导航设备,并且外部信号可以表示或与原子钟信号或表现出足够稳定性的其它信号同步。

    CIRCUIT AND METHOD FOR GENERATING A CLOCK SIGNAL
    74.
    发明申请
    CIRCUIT AND METHOD FOR GENERATING A CLOCK SIGNAL 有权
    用于产生时钟信号的电路和方法

    公开(公告)号:US20110156821A1

    公开(公告)日:2011-06-30

    申请号:US12975125

    申请日:2010-12-21

    Applicant: Henry Ge

    Inventor: Henry Ge

    CPC classification number: H03L7/00 H03L1/00

    Abstract: A circuit comprises a frequency divider configured to receive an oscillating signal generated by an oscillator and to divide the oscillating signal into a clock signal, wherein the division ratio of the frequency divider is set to a value equal to one of: the integer part of the resonant frequency of the oscillator and the integer part of the resonant frequency of the oscillator plus 1.

    Abstract translation: 电路包括:分频器,被配置为接收由振荡器产生的振荡信号,并将振荡信号分频为时钟信号,其中分频器的分频比被设置为等于以下的值之一: 振荡器的谐振频率和振荡器的谐振频率的整数部分加1。

    Current source, electronic apparatus, and integrated circuit
    75.
    发明申请
    Current source, electronic apparatus, and integrated circuit 有权
    电流源,电子设备和集成电路

    公开(公告)号:US20110080145A1

    公开(公告)日:2011-04-07

    申请号:US12923326

    申请日:2010-09-15

    Inventor: Yasunori Tsukuda

    CPC classification number: H03L1/00 H03L7/0805 H03L7/0995 H03L7/102

    Abstract: Disclosed herein is a current source, including: a current control oscillator configured to output an oscillation signal of a frequency dependent on an input current; a comparator configured to compare the oscillation signal with a reference signal; a charge pump configured to output a current dependent on a comparison result by the comparator; a low-pass filter configured to include a smoothing capacitor charged and discharged by an output current of the charge pump; a loop converter configured to be connected to the smoothing capacitor and generate a current dependent on a voltage generated by the smoothing capacitor to supply the current as the input current to the current control oscillator; and an output converter configured to be connected to the low-pass filter and generate a current dependent on a voltage generated in the low-pass filter to output the current as an output current.

    Abstract translation: 本文公开了一种电流源,包括:电流控制振荡器,被配置为输出取决于输入电流的频率的振荡信号; 比较器,被配置为将所述振荡信号与参考信号进行比较; 电荷泵,被配置为根据比较器的比较结果来输出电流; 低通滤波器,其被配置为包括通过所述电荷泵的输出电流充电和放电的平滑电容器; 环路转换器,被配置为连接到平滑电容器,并且产生取决于平滑电容器产生的电压的电流,以将电流作为输入电流提供给电流控制振荡器; 以及输出转换器,被配置为连接到低通滤波器并且产生取决于在低通滤波器中产生的电压的电流以输出电流作为输出电流。

    ELECTRONIC APPARATUS COMPENSATED THROUGH MONITORING A STATUS OF GNSS RECEIVER AND RELATED METHOD THEREOF
    76.
    发明申请
    ELECTRONIC APPARATUS COMPENSATED THROUGH MONITORING A STATUS OF GNSS RECEIVER AND RELATED METHOD THEREOF 失效
    通过监测GNSS接收机的状态补偿的电子设备及其相关方法

    公开(公告)号:US20110025427A1

    公开(公告)日:2011-02-03

    申请号:US12905105

    申请日:2010-10-15

    Inventor: Cheng-Yi Ou-Yang

    CPC classification number: H03L1/00

    Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.

    Abstract translation: 在一个示例性实现中,电子设备包括:用于产生参考时钟的参考时钟源; 用于接收卫星信号和参考时钟的全球导航卫星系统(GNSS)接收机,包括:监测电路,用于监测GNSS接收机的状态以产生监测结果; 以及耦合到参考时钟源和监视电路的补偿电路,用于根据监视结果补偿参考时钟。

    Methods of calibrating a clock using multiple clock periods with a single counter and related devices and methods
    77.
    发明授权
    Methods of calibrating a clock using multiple clock periods with a single counter and related devices and methods 有权
    使用单个计数器和相关设备和方法使用多个时钟周期校准时钟的方法

    公开(公告)号:US07881895B2

    公开(公告)日:2011-02-01

    申请号:US12127336

    申请日:2008-05-27

    Abstract: A method of calibrating a first clock signal using a second clock signal and a plurality of calibration periods may include generating incremented counter values at a counter responsive to edges of the second clock signal. For at least two of the plurality of calibration periods, an initial incremented counter value from the counter may be stored in memory at an initial edge of the first clock signal for the respective calibration period, a final incremented counter value may be stored in memory at a final edge of the clock signal for the respective calibration period, and the at least two of the plurality of calibration periods may be overlapping with different initial and final edges of the first clock signal. For each of the plurality of calibration periods, a number of edges of the second clock signal occurring during the respective calibration period may be determined using the initial and final incremented counter values stored in memory. A relationship between the first and second clock signals may be determined using a sum of a number of edges of the second clock signal occurring during each of the plurality of calibration periods and using a sum of a number of first clock signal cycles occurring during each of the plurality of calibration periods.

    Abstract translation: 使用第二时钟信号和多个校准周期来校准第一时钟信号的方法可以包括响应于第二时钟信号的边缘在计数器处产生递增的计数器值。 对于多个校准周期中的至少两个,来自计数器的初始递增的计数器值可以在相应的校准周期的第一时钟信号的初始边缘存储在存储器中,最后增加的计数器值可以存储在存储器中 用于相应校准周期的时钟信号的最后边缘,并且多个校准周期中的至少两个可以与第一时钟信号的不同初始和最后边缘重叠。 对于多个校准周期中的每一个,可以使用存储在存储器中的初始和最后递增的计数器值来确定在各个校准周期期间发生的第二时钟信号的边缘数量。 第一和第二时钟信号之间的关系可以使用在多个校准周期中的每一个期间发生的第二时钟信号的边缘数之和并且使用在每个校准周期期间发生的多个第一时钟信号周期的和 多个校准周期。

    SELF-CALIBRATING OSCILLATOR
    78.
    发明申请
    SELF-CALIBRATING OSCILLATOR 有权
    自校准振荡器

    公开(公告)号:US20100271139A1

    公开(公告)日:2010-10-28

    申请号:US12750723

    申请日:2010-03-31

    Applicant: Eiji SHIKATA

    Inventor: Eiji SHIKATA

    CPC classification number: H03L1/00

    Abstract: An oscillator that increases the accuracy of an output frequency, without using a charge pump, has an oscillation circuit, first and second voltage supply circuits, and a calibration value generation circuit. The first voltage supply circuit includes a resistor and a capacitor, the resistance and capacitance of which are determined so that a first voltage reaches a reference voltage within a reference time. The second voltage supply circuit includes first and second switching means, which perform switching when receiving pulse signals corresponding to the frequency of the oscillation circuit to raise the second voltage. A calibration value generation circuit provides the oscillation circuit with a calibration value that lowers the frequency when the second voltage reaches the reference voltage before the first voltage and raises the frequency when the second voltage reaches the reference voltage after the first voltage.

    Abstract translation: 在不使用电荷泵的情况下增加输出频率的精度的振荡器具有振荡电路,第一和第二电压供给电路以及校准值生成电路。 第一电压供应电路包括电阻器和电容器,其电阻和电容被确定为使得第一电压在参考时间内达到参考电压。 第二电压供给电路包括第一和第二开关装置,当接收与振荡电路的频率对应的脉冲信号以提高第二电压时,执行开关。 校准值产生电路为振荡电路提供校准值,当第二电压在第一电压之前达到参考电压时降低频率,并且当第二电压在第一电压之后达到参考电压时升高频率。

    CURRENT CONTROLLED OSCILLATOR WITH REGULATED SYMMETRIC LOADS
    79.
    发明申请
    CURRENT CONTROLLED OSCILLATOR WITH REGULATED SYMMETRIC LOADS 有权
    具有调节对称负载的电流控制振荡器

    公开(公告)号:US20100237952A1

    公开(公告)日:2010-09-23

    申请号:US12407113

    申请日:2009-03-19

    CPC classification number: H03L1/00 H03K3/0322

    Abstract: An integrated circuit incorporating a bias circuit for a current-controlled oscillator (ICO) with improved power supply rejection ratio (PSRR) is described. The bias circuit for the ICO includes two error amplifiers. The first error amplifier regulates the bias voltage, VBN, referenced to a ground supply (GND). The second error amplifier regulates the bias voltage, VBP, referenced to a positive power supply (VDD). The VBP and VBN bias voltages have improved PSRR relative to conventional ICO bias circuits for noise injected into VDD and GND.

    Abstract translation: 描述了具有改善的电源抑制比(PSRR)的电流控制振荡器(ICO)的偏置电路的集成电路。 ICO的偏置电路包括两个误差放大器。 第一个误差放大器调节参考接地电源(GND)的偏置电压VBN。 第二个误差放大器调节参考正电源(VDD)的偏置电压VBP。 相对于常规ICO偏置电路,VBP和VBN偏置电压对于注入VDD和GND的噪声具有改进的PSRR。

Patent Agency Ranking