Abstract:
In a binary search, two storage units are prepared so that when the least significant bit of the search address is “0” and “1”, even and odd address banks respectively are used. The search object data is classified according to data belonging to the odd and even addresses in continuous addresses and allocated to these two storage units. Further, a search tree of the search address is constructed so that two data of object for a next search are stored in different storage units. Upon the binary search, addresses for the two storage units are set according to this search tree. Therefore, simultaneous readout of data is enabled, so that readout and comparison are carried out in parallel. Further, according to multiple division search of the invention, if 2 bits of the least significant bits of the search address are “00”, “01”, “10” and “11”, a search object data is stored in first through fourth banks respectively. A search tree of the search address is constructed so that four data of object for a next search are stored in different banks. Upon a search, an address for each bank is set according to the search tree so as to enable readout of data at the same time, thereby reducing time required for the search.
Abstract:
A method and apparatus for carrying out binary search based on a plurality of retrieval conditions. Retrieval object data is classified into higher order bits and lower order bits. A portion of retrieval key data, in correspondence with the higher order bits of the retrieval object data, constitutes first key data and a portion in correspondence with the lower order bits of the retrieval object data constitutes second retrieval key data. A higher order bit comparing circuit 13 is provided for comparing the higher order bits of the retrieval object data with the first retrieval key data and a lower order bit comparing circuit 14 and for comparing the lower order bits of the retrieval object data with the second retrieval key data. Further, there is provided a determining circuit 16 for determining coincidence or non-coincidence between the retrieval key data and the retrieval object data in accordance with a comparison enabling bit EB indicating coincidence conditions, a comparison result of the higher order bit comparing circuit 13 and comparison result of the lower bit comparing circuit 14.
Abstract:
In magnifying a multivalued image, binary images are generated by using the respective density levels of the multivalued image as thresholds. The contour of each binary image is equivalent to an equidensity curve corresponding to each density gradient of the original multivalued image. Outline vectors of each binary image are extracted and magnified/smoothed. The contour of each binary image represents an equidensity curve corresponding to each density gradient of the magnified multivalued image. In a binary image area corresponding to a black pixel of each binary image, a pixel having a density equal to the threshold used to generate the binary image is written. This processing is sequentially performed for all the binary images from a low-density binary image to a high-density binary image to generate a multivalued image. The objected multivalued image is subjected to density gradient smoothing processing. As a result, a magnified multivalued image is obtained.
Abstract:
An IC chip is mounted on a circuit substrate by the flip chip mounting. A projection is provided for forming an eccentric space between the IC chip and the circuit substrate at a position deviated from a center of the IC chip. A sealing resin is injected in a space between the IC chip and the circuit substrate.
Abstract:
An outline extraction method and apparatus which extracts a line of interest from image data in order of raster scanning and detects outline vectors of the pixels in the line of interest. The detected outline vectors are sequentially stored in a memory, a state of connection between the stored outline vectors and the other outline vectors in the line of interest is determined, and the outline of the image data is extracted based on the state. Accordingly, coordinates of an intersecting point of the outline of the image data with the coordinate axis of the outline vector is obtained and the image data is coded by generating coded data indicating a white run length and black run length for every line from the coordinates of the intersecting point.
Abstract:
In a memory-to-memory data transfer apparatus, each of a plurality of memories connected to a memory bus is sequentially selected, and data which occupy predetermined positions in the data read from the selected memory are combined into a set of data. The set of data is sequentially written while addresses in the remaining memory is being updated. Alternatively, a plurality of sets of data are sequentially read out while addresses in a memory are being updated, and data which occupy predetermined positions in the read data are combined into a set of data. The set of data is written while the remaining memories are being sequentially selected. The apparatus may have a plurality of memories connected to a data bus and address generators for generating unique addresses for each of the memories in accordance with a predetermined synchronizing signal. The apparatus, in preferred form, effects transfer of data in thinned-out form or phase-divided form by shifting a generated address or by adding a predetermined value to the address.
Abstract:
An image processing apparatus is composed of an image memory comprising a plurality of memory elements, and a processor unit comprising a plurality of processor elements. By suitably engineering the arrangement of the image memory of memory elements, the arrangement of the processor unit of processor elements and the connections among the memory elements and processor elements, it is possible to realize, through a simple construction, high-speed image processing such as image density conversion, image color conversion, image masking, image spatial filtering, image enlargement, image reduction, image rotation, image compression, image extension and image color correction. Also provided are an image processing apparatus for a color image, composed of a plurality of image memories and a plurality of processor elements, and a generalized, multifunctional data parallel processing apparatus capable of processing a large volume of data at high speed.
Abstract:
Outline vectors representing an arrangement of pixels of a binary image obtained by a binary image obtaining unit are extracted by an outline extractor. From the extracted outline vector, isolated points are extracted. These isolated points are stored in an isolated point data generator 7 as information indicative of the position of isolated point. The outline vectors other than the isolated points are stored in the vector generator 3 as vector data. When a binary image is reproduced, the stored position information of the isolated points is developed to produce vector data by the isolated point data developer 8. Accordingly, since the isolated points are stored not in the form of outline vectors, but position information, the storage capacity for storing the outline vectors can be small. This construction is effective in halftone image in particular.
Abstract:
A resin encapsulated pin grid array includes an IC chip mounted on a resin substrate having a plurality of contact pins on its lower surface and resin-encapsulated by injection molding. A metal heat radiating member is integrally formed on the upper surface of the encapsulating resin when the encapsulating resin is injection-molded.
Abstract:
An image encoding method, and an apparatus therefor, enabling rapid comprehension of the outline of the entire image promptly, at the decoding of the encoded image information, and also an image encoding method, and an apparatus therefor, capable of efficient encoding adapted for the state of the image to be encoded. Image information is divided into plural block, each consisting of plural pixels, the frequency of the image in each block is analyzed, the frequency components of the image in each block are separated into plural bands, and the frequency components contained in each of said plural bands are encoded.