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公开(公告)号：US20240295892A1
公开(公告)日：2024-09-05
申请号：US18592209
申请日：2024-02-29
发明人： John Stuart KLEINE
摘要： A voltage regulator feedback circuit includes a first comparator, a second comparator and a logic circuit. The first comparator is configured to generate an overshoot signal based on a comparison of a voltage regulation target signal to a feedback voltage signal. The second comparator is configured to generate a forward current signal based on a comparison of the current sense amplifier voltage to a reference voltage. The logic circuit is configured to generate a breaking signal based on the overshoot signal and the forward current signal. A gate signal of a transistor connected between a second end of the inductor and a reference ground is generated based at least in part on the breaking signal and is configured to cause the transistor to open based at least in part on the breaking signal having a true value.
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公开(公告)号：US12057765B2
公开(公告)日：2024-08-06
申请号：US17707329
申请日：2022-03-29
摘要： Apparatuses and methods for operating a power converter are described. An integrated circuit can be integrated in a high-side driver of a high-side fiend-effect transistor (FET) of the power converter. The integrated circuit can detect a phase node voltage of a power integrated circuit. The integrated circuit can, in response to the phase node voltage being less than a threshold voltage, operate a high-side FET of the power integrated circuit in a constant-current mode. The integrated circuit can, in response to the phase node voltage being greater than the threshold voltage, operate the high-side FET of the power integrated circuit in a constant-voltage mode.
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公开(公告)号：US20240258919A1
公开(公告)日：2024-08-01
申请号：US18162932
申请日：2023-02-01
发明人： Zheyuan Tan
IPC分类号： H02M3/158
CPC分类号： H02M3/158
摘要： A switched-mode power supply, such as a constant on time regulator, is presented. The switched-mode power supply includes a high side power switch coupled to a low side power switch at a switching node. A ramp injection circuit is coupled to the switching node and a ramp switch is coupled to the ramp injection circuit are also provided. A driver is used to drive the high side power switch and the low side power switch and to control the ramp switch. The driver turns off the ramp switch when the switch-mode power supply enters a tri-state, and turns the ramp switch back on when the switch-mode power supply exists the tri-state. The tri-state occurs when the switched-mode power supply operates in a discontinuous current mode, when both the high side power switch and the low side power switch are turned off.
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公开(公告)号：US20240204566A1
公开(公告)日：2024-06-20
申请号：US17801149
申请日：2022-07-21
发明人： Sheng Yuan , Jiangjian Huang , Shangfeng Jiang , Weiwei Zhou
CPC分类号： H02J50/10 , H01F27/2804 , H01F41/041 , H01F2027/2809
摘要： Apparatuses including a coil and methods of forming the coil are described. The coil can include a first coil layer including at least an inner strand and an outer strand. The coil can further include a second coil layer including at least an inner strand and an outer strand. The inner strand of the first coil layer can be connected to the outer strand of the second coil layer. The outer strand of the first coil layer can be connected to the inner strand of the second coil layer.
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公开(公告)号：US11985014B2
公开(公告)日：2024-05-14
申请号：US17831959
申请日：2022-06-03
发明人： Damla Solmaz Acar , Pooja Agrawal , Jure Menart , Tao Qi , Mihail Jefremow , Gustavo James Mehas
摘要： In an embodiment, a semiconductor device is disclosed that includes at least one processing device and firmware including a dynamic demodulation engine. The dynamic demodulation engine, when executed by the at least one processing device, is configured to obtain a digital signal waveform, dynamically select a bit detection method based at least in part on a characteristic of the digital signal waveform, perform demodulation of the digital signal waveform using the selected bit detection method and generate decoded packets based at least in part on the demodulation.
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公开(公告)号：US11972675B2
公开(公告)日：2024-04-30
申请号：US17745990
申请日：2022-05-17
摘要： In an embodiment, a semiconductor device is disclosed. The semiconductor device includes a plurality of output pins. Each of the output pins is electrically connected to an input pin of a buzzer and to a buzzer driver. The buzzer driver is configured to cause the buzzer to emit an audible sound. The semiconductor device further includes a plurality of ground switches. Each ground switch is configured to connect a corresponding output pin of the plurality of output pins to ground when closed. The semiconductor device further includes a current generator that is configured to supply a test current to a given output pin of the plurality of output pins and a clamp switch that is configured to connect the given output pin to an analog-to-digital converter.
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公开(公告)号：US20240120924A1
公开(公告)日：2024-04-11
申请号：US17961741
申请日：2022-10-07
发明人： Menno Tjeerd Spijker
CPC分类号： H03L7/07 , H03L7/1075 , H03L7/23 , H04L7/0337
摘要： Semiconductor devices for synchronizing networks are described. A semiconductor device can include an analog phase-lock loop (APLL) configured to output a first signal. The semiconductor device can further include a first digital phase-lock loop (DPLL) configured to output a second signal. The semiconductor device can further include a second DPLL configured to output a third signal. A combination of the first signal and the second signal can be used to generate a first output clock signal. A difference resulting from a subtraction of the second signal from the third signal can be used to generate a second output clock signal.
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公开(公告)号：US11831405B2
公开(公告)日：2023-11-28
申请号：US17692762
申请日：2022-03-11
CPC分类号： H04J3/0667 , H04J3/025 , H04J3/0617
摘要： Systems and methods for reducing phase delay variation impact are described. A microcontroller can receive a sequence of phase offsets determined by a slave device over time. The microcontroller can determine a weight vector based on a metric associated with the sequence of phase offsets. The microcontroller can adjust a set of filter coefficients based on the weight vector. The set of filter coefficients can be filter coefficients of a filter being implemented by the slave device to filter incoming packet data.
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公开(公告)号：US20230318361A1
公开(公告)日：2023-10-05
申请号：US18331583
申请日：2023-06-08
发明人： Jiangjian HUANG , Hulong ZENG
CPC分类号： H02J50/12 , H04B5/0081 , H04B5/0037 , H02M7/521
摘要： Apparatuses including multiple selectable circuit elements are described. In an example, an apparatus may include a power supply configured to output a voltage. The apparatus may further include a controller connected to the power supply and a transmission unit connected to the controller. The transmission unit may be configured to output power. The transmission unit may include comprising an inverter connected to the power supply. The inverter may include a high-side switching element. The transmission unit may further include a circuit element a circuit connected to the power supply. The circuit may be configured to select the circuit element. The circuit may include a switch connected between the inverter and the circuit element. The switch and the high-side switching element may be configured to be driven by the voltage outputted by power supply. The controller may be configured to control the power being outputted by the transmission unit.
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公开(公告)号：US11747379B2
公开(公告)日：2023-09-05
申请号：US17592934
申请日：2022-02-04
发明人： David Mitchell Grice
CPC分类号： G01R27/2629 , G01R35/005
摘要： In an embodiment, an apparatus is disclosed that comprises a plurality of resistors arranged as a reverse bridge and configured to convert an input voltage to a scaled output voltage. The scaled output voltage is scaled to a target format based at least in part on a range of the input voltage and a fixed value of the plurality of resistors. The input voltage is generated based at least in part on at least one signal generated by a sensor based at least in part on a measurement of a property of a measurement target. At least one of the plurality of resistors has a resistance value of R and at least another of the plurality of resistors has a resistance value of R plus or minus ΔR.
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