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公开(公告)号：US06218899B1
公开(公告)日：2001-04-17
申请号：US09548071
申请日：2000-04-12
IPC分类号： H03F345
CPC分类号： H03F3/4508 , H03F2203/45391 , H03F2203/45686 , H03G1/0023 , H03G1/007 , H04B1/18
摘要： A highly linear variable-gain low noise amplifier is constructed using a transistor pair having variable gain control. The gain of the transistor pair is achieved by a segmented resistor having controllable PMOS (or NMOS) components. The circuit includes a variable voltage source and operates to handle wideband radio transmissions via broadcast or cable.
摘要翻译： 使用具有可变增益控制的晶体管对来构建高度线性的可变增益低噪声放大器。 晶体管对的增益通过具有可控PMOS（或NMOS）部件的分段电阻来实现。 该电路包括可变电压源，并且经由广播或电缆处理宽带无线电传输。
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公开(公告)号：US06181202B2
公开(公告)日：2001-01-30
申请号：US09196700
申请日：1998-11-20
申请人： Koichi Yamasaki
发明人： Koichi Yamasaki
IPC分类号： H03F345
CPC分类号： H03F3/4508 , H01L29/735 , H03F3/45085 , H03F3/45179 , H03F3/45183 , H03F2203/45674
摘要： The differential amplifier made in a CMOS monolisic IC form has input offset voltage worse than the case structured by the bipolar element. A bipolar element structured by a usual CMOS process is used in a differential amplifying stage having a greatest effect on input offset voltage in a CMOS differential amplifier, thereby obtaining a differential amplifier with reduced input offset voltage.
摘要翻译： CMOS立体声IC形式的差分放大器的输入失调电压比由双极元件构成的情况差。 在CMOS差分放大器中对输入失调电压具有最大影响的差分放大级中使用由通常的CMOS工艺构成的双极元件，从而获得具有降低的输入失调电压的差分放大器。
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公开(公告)号：US06049252A
公开(公告)日：2000-04-11
申请号：US106232
申请日：1998-06-29
申请人： Hiromitsu Iwata
发明人： Hiromitsu Iwata
CPC分类号： H03F3/4508 , H03F3/45085 , H03F3/45278 , H03F3/72 , H03G1/0023 , H03G1/0088 , H03G3/001 , H03F2203/45462 , H03F2203/45466 , H03F2203/45471 , H03F2203/45504 , H03F2203/45641 , H03F2203/45696 , H03F2203/45702 , H03F2203/45726
摘要： To provide a programmable-gain amplifier in which sufficiently fine and linear gain control according to the logic levels of control signals can be realized with a simple circuit configuration, a programmable-gain amplifier includes a cascade connection of differential amplifiers (E.sub.1 to E.sub.n) and a current controller (100) for controlling a product of corresponding emitter currents supplied to each of the differential amplifiers (E.sub.1 to E.sub.n) according to the logic levels of binary control signals. The current controller (100) has a current mirror circuit in which the emitter of each bi-polar transistor (Q.sub.0 to Q.sub.n, Q.sub.c1 to Q.sub.cm) is connected to the ground through a MOS (M.sub.0 to M.sub.n, M.sub.c1 to M.sub.cm) transistor having a relative on-resistance designed to be in inverse proportion to the relative emitter size of the bi-polar transistor, so that the emitter current can be exactly controlled.
摘要翻译： 为了提供一种可编程增益放大器，其中可以利用简单的电路配置实现根据控制信号的逻辑电平的足够精细和线性增益控制，可编程增益放大器包括差分放大器（E1至En）和 电流控制器（100），用于根据二进制控制信号的逻辑电平来控制提供给每个差分放大器（E1至En）的相应发射极电流的乘积。 电流控制器（100）具有电流镜电路，其中每个双极晶体管（Q0至Qn，Qc1至Qcm）的发射极通过MOS（M0至Mn，Mc1至Mcm）晶体管连接到地，具有 相对导通电阻被设计为与双极晶体管的相对发射极尺寸成反比，使得可以精确地控制发射极电流。
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64.发明授权Differential circuit having a variable current circuit for producing an exponential or a square transfer characteristic 失效差分电路具有用于产生指数或方波传递特性的可变电流电路
公开(公告)号：US5754076A
公开(公告)日：1998-05-19
申请号：US357252
申请日：1994-12-13
申请人： Katsuji Kimura
发明人： Katsuji Kimura
CPC分类号： H03F3/4508 , G06G7/20 , G06G7/24 , H03F3/45071 , H03F3/45076 , H03F3/45085 , H03F3/45179 , H03F3/45183 , H03F2203/45112 , H03F2203/45454 , H03F2203/45466 , H03F2203/45471 , H03F2203/45476 , H03F2203/45574
摘要： In a differential circuit including first and second transistors, a constant current circuit causes a constant current to flow through the first transistor. A variable current circuit causes a variable current to flow through the second transistor. A differential input voltage is given to drive the first and the second transistors and to produce an output signal in the form of an output current which may be either a differential output current across two output electrodes or a variable output current flowing through an output electrode. Each of the first and the second transistors may be bipolar transistors or MOSFET's. A relationship between the differential input voltage and the output signal is specified by a peculiar characteristic dependent on the bipolar transistors or the MOSFET's. Therefore, the differential circuit may be incorporated in an LSI circuit.
摘要翻译： 在包括第一和第二晶体管的差分电路中，恒流电路使恒定电流流过第一晶体管。 可变电流电路使可变电流流过第二晶体管。 给出差分输入电压以驱动第一和第二晶体管，并产生输出电流形式的输出信号，输出电流可以是两个输出电极之间的差分输出电流或流过输出电极的可变输出电流。 第一和第二晶体管中的每一个可以是双极晶体管或MOSFET。 差分输入电压和输出信号之间的关系由取决于双极晶体管或MOSFET的特殊特性来指定。 因此，可以将差分电路并入LSI电路。
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公开(公告)号：US5734296A
公开(公告)日：1998-03-31
申请号：US618671
申请日：1996-03-19
CPC分类号： H03F3/4508 , H03F3/3067 , H03F3/343 , H03F3/45076 , H03F2203/45028 , H03F2203/45182
摘要： Low voltage operational amplifier (10) operates in a voltage range of one to eight volts over a temperature range of 0.degree. to 70.degree. centigrade. Op amp input stage (12) uses N-channel depletion-mode MOSFETs to provide amplification of the differential input and maintain constant transconductance. Source follower MOSFET (13) provides unity gain in transferring the AC signal, STAGE-1 OUTPUT, to the base of current sinking transistor (18). Sink control circuit (14) and source control circuit (22) generate the base drive currents for transistors (18) and (24). The signal at the output of MOSFET (13) either causes the sink transistor (18) to sink current or the signal to be transposed by means of a translinear loop (16) and causes the source transistor (24) to source current. An output stage provides approximately fifty milliamps of current drive and is quiescent until the output driver is selected.
摘要翻译： 低压运算放大器（10）在0至70℃的温度范围内工作在1-8伏特的电压范围内。 运算放大器输入级（12）使用N沟道耗尽型MOSFET来提供差分输入的放大并保持恒定的跨导。 源极跟随器MOSFET（13）在将AC信号STAGE-1 OUTPUT传送到电流吸收晶体管（18）的基极时提供单位增益。 漏极控制电路（14）和源极控制电路（22）产生用于晶体管（18）和（24）的基极驱动电流。 MOSFET（13）的输出处的信号或者使得宿晶体管（18）通过一个跨线性环路（16）吸收电流或者被转置的信号，并且使源极晶体管（24）产生电流。 输出级提供大约五十毫安的电流驱动器，并且静止，直到选择输出驱动器为止。
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公开(公告)号：US5424681A
公开(公告)日：1995-06-13
申请号：US272262
申请日：1994-07-08
申请人： Michio Yotsuyanagi
发明人： Michio Yotsuyanagi
CPC分类号： H03F3/4508 , H03F3/45179 , H03F3/45192 , H03F2203/45028 , H03F2203/45122 , H03F2203/45302 , H03F2203/45648 , H03F2203/45674
摘要： An operational amplifier includes a transistor differential pair having a common source terminal which is coupled to a first power supply terminal through a first current source circuit. A first transistor is provided which has a gate coupled to a first input terminal of the transistor differential pair, a source coupled to a first output of the transistor differential pair, and a drain coupled to a first output terminal. A second current source circuit is coupled between the first power supply terminal and the drain of the first transistor. A second transistor has a gate coupled to a second input terminal of the transistor differential pair, a source coupled to a second output of the transistor differential pair, and a drain coupled to a second output terminal. A third current source circuit is coupled between the first power supply terminal and the drain of the second transistor. A fourth current source circuit is coupled between the source of the first transistor and the second power supply terminal. A fifth current source circuit is coupled between the source of the second transistor and the second power supply terminal. The input signals of the transistor pair are applied to the gates of the source-input transistors connected to the transistor differential pair.
摘要翻译： 运算放大器包括具有公共源极端子的晶体管差分对，其通过第一电流源电路耦合到第一电源端子。 提供了第一晶体管，其具有耦合到晶体管差分对的第一输入端的栅极，耦合到晶体管差分对的第一输出的源和耦合到第一输出端的漏极。 第二电流源电路耦合在第一电源端子和第一晶体管的漏极之间。 第二晶体管具有耦合到晶体管差分对的第二输入端的栅极，耦合到晶体管差分对的第二输出的源极和耦合到第二输出端子的漏极。 第三电流源电路耦合在第一电源端子和第二晶体管的漏极之间。 第四电流源电路耦合在第一晶体管的源极和第二电源端子之间。 第五电流源电路耦合在第二晶体管的源极和第二电源端子之间。 晶体管对的输入信号被施加到连接到晶体管差分对的源极 - 输入晶体管的栅极。
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公开(公告)号：US5365193A
公开(公告)日：1994-11-15
申请号：US982376
申请日：1992-11-25
CPC分类号： H03F3/4508 , H03F1/223 , H03F3/45286 , H03F2203/45304 , H03F2203/45674 , H03F2203/45696
摘要： A circuit device for neutralizing thermal drift in a transconductor differential stage using a first circuit portion which corresponds structurally to the transconductor differential stage and has a pair of MOS input transistors defining a transconductance value which is substantially proportional to that of the transconductor differential stage, a pair of bipolar output transistors coupled to the MOS input transistors in a cascode configuration, and a second circuit portion being supplied a current from an output of the first differential portion to thereby output a current to be passed to the transconductor differential stage. The value of the output current is inversely proportional to temperature-dependent parameters of the transconductance.
摘要翻译： 一种电路装置，用于使用在结构上对应于跨导差分级的第一电路部分中和跨导差分级中的热漂移，并且具有一对限定跨导值的MOS输入晶体管，所述跨导值基本上与跨导差动级的导数值成正比， 一对双极性输出晶体管，其以共源共栅配置耦合到MOS输入晶体管;以及第二电路部分，从第一差分部分的输出端提供电流，从而输出要传递到跨导差分级的电流。 输出电流的值与跨导的温度相关参数成反比。
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公开(公告)号：US5218319A
公开(公告)日：1993-06-08
申请号：US886239
申请日：1992-05-21
申请人： Kyuichi Takimoto
发明人： Kyuichi Takimoto
CPC分类号： H03F3/4508 , H03F3/45085 , H03H11/1217 , H04M1/725 , H03F2200/219 , H03F2203/45022 , H03F2203/45258 , H03F2203/45346 , H03F2203/45392 , H03F2203/45612 , H03F2203/45652 , H03F2203/45674 , H03F2203/45691
摘要： A differential amplifier comprises a pair of current mirror circuits, a pair of constant current supplies and a pair of differential amplifier circuits. The first differential amplifier circuit is provided between the first current mirror circuit and the first constant current supply. The second differential amplifier circuit is positioned between the second constant current supply and the second current mirror circuit. The second differential amplifier circuit includes a pair of multicollector pnp transistors each having a first one of its collectors connected to the second current mirror circuit and a second one of its collectors connected to the second power supply. The first differential amplifier circuit performs differential amplification on an externally supplied input signal and an output signal of the second differential amplifier circuit, thereby to produce complementary differential output signals which are supplied as corresponding input signals to the second differential amplifier circuit and which performs differential amplification thereon and produces, as the output signal thereof, the output signal of the differential amplifier. A plurality of the differential amplifiers may be used in an active filter.
摘要翻译： 差分放大器包括一对电流镜电路，一对恒流源和一对差分放大电路。 第一差分放大器电路设置在第一电流镜电路和第一恒流源之间。 第二差分放大器电路位于第二恒流源和第二电流镜电路之间。 第二差分放大器电路包括一对多反射器pnp晶体管，其每一个具有连接到第二电流镜电路的集电极中的第一个和与第二电源连接的第二个集电极。 第一差分放大器电路对外部提供的输入信号和第二差分放大器电路的输出信号执行差分放大，从而产生作为相应输入信号提供给第二差分放大器电路并且执行差分放大的互补差分输出信号 作为其输出信号，产生差分放大器的输出信号。 多个差分放大器可以用在有源滤波器中。
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公开(公告)号：US5210505A
公开(公告)日：1993-05-11
申请号：US848863
申请日：1992-03-10
申请人： Dennis N. Eddlemon
发明人： Dennis N. Eddlemon
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45076 , H03F3/4508 , H03F3/45188 , H03F3/45385 , H03F3/45479 , H03F3/45735 , H03F2203/45674
摘要： An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. According to a first embodiment, feedback circuits are coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. According to a second embodiment, a single feedback circuit controls the voltage at a first node and the same feedback circuit maintains the voltage level of a second node at a constant level. Either feedback circuit eliminates circuit drift and offset voltage changes resulting from changes in common mode and/or power supply voltages by eliminating the effects of resistive loading on the input stage components.
摘要翻译： 运算放大器输入级包括耦合作为差分放大器以接收输入信号的两个晶体管。 为了降低每个晶体管上的电压，至少一个晶体管堆叠在每个输入晶体管的负载电路中。 为了消除由堆叠晶体管的常规电阻器自偏压引起的误差电流的影响，识别输入晶体管耦合到的两个节点。 根据第一实施例，反馈电路耦合到每个节点，并且每个反馈电路将耦合节点维持在由运算放大器的反馈装置建立的电压电平。 根据第二实施例，单个反馈电路控制第一节点处的电压，并且相同的反馈电路将第二节点的电压电平维持在恒定水平。 反馈电路通过消除输入级组件上的电阻负载的影响，消除了由共模和/或电源电压变化引起的电路漂移和偏移电压变化。
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公开(公告)号：US5142243A
公开(公告)日：1992-08-25
申请号：US618388
申请日：1990-12-19
申请人： Dennis N. Eddlemon
发明人： Dennis N. Eddlemon
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/4508 , H03F3/45188 , H03F3/45385 , H03F3/45735 , H03F2203/45674
摘要： An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. A feedback circuit is coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. The disclosed circuit eliminates circuit drift and offset voltages resulting from changes in common mode and/or power supply voltages by eliminating the effects of resistive loading on the input stage components.
摘要翻译： 运算放大器输入级包括耦合作为差分放大器以接收输入信号的两个晶体管。 为了降低每个晶体管上的电压，至少一个晶体管堆叠在每个输入晶体管的负载电路中。 为了消除由堆叠晶体管的常规电阻器自偏压引起的误差电流的影响，识别输入晶体管耦合到的两个节点。 反馈电路耦合到每个节点，并且每个反馈电路将耦合节点维持在由运算放大器的反馈装置建立的电压电平。 所公开的电路通过消除对输入级组件的电阻负载的影响而消除由共模和/或电源电压的变化引起的电路漂移和偏移电压。
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