摘要:
A method of forming a low dielectric constant silicate material for use in integrated circuit fabrication processes is disclosed. The low dielectric constant silicate material is formed by reacting by reacting a gas mixture comprising an organosilane compound, an oxygen source, and an inert gas. Thereafter, a silicon carbide cap layer is formed on the silicate material by reacting a gas mixture comprising a silicon source and a carbon source. The silicon carbide cap layer protects the underlying organosilicate layer from cracking and peeling when it is hardened during a subsequent annealing step.
摘要:
A method for forming an insulation layer over a substrate. The method forms a carbon-doped silicon oxide layer by thermal chemical vapor deposition using an organosilane. The carbon-doped silicon oxide layer is subsequently cured and densified. In one embodiment, the cured film is densified in a nitrogen-containing plasma. The method is particularly suitable for deposition of low dielectric constant films, i.e., where k is less than or equal to 3.0. Low-k, carbon-doped silicon oxide methylsilane or di-, tri-, tetra-, or phenylmethylsilane. and ozone. The above method can be carried out in a substrate processing system having a process chamber; a substrate holder, a heater, a gas delivery system, and a power supply, all of which are coupled to a controller. The controller contains a memory having a computer-readable medium with a program embodied for directing operation of the system in accordance with above method.
摘要:
A method and an apparatus for increasing a deposition rate of dielectric films deposited on a substrate for a given temperature while providing the same with good step coverage and gap-fill properties. This is achieved by employing bistertiarybutylaminesilane as a silicon source to react with an oxidizing agent to form a dielectric film on a substrate that includes silicon.
摘要:
A multistep method for planarizing a silicon oxide insulating layer such as a deposited borophosphosilicate glass (BPSG) layer. The method includes several different planarization stages. During an initial, pre-planarization stage, a substrate having a BPSG layer deposited over it is loaded into a substrate processing chamber. Then, during a first planarization stage after the pre-planarization stage, oxygen and hydrogen are flowed into the substrate processing chamber to form a steam ambient in said chamber and the substrate is heated in the steam ambient from a first temperature to a second temperature. The first temperature is below a reflow temperature of the BPSG layer and the second temperature is sufficient to reflow the layer. After the substrate is heated to the second temperature during a second planarization stage, the temperature of the substrate and the conditions within the substrate processing chamber are maintained at conditions sufficient to reflow the BPSG layer in the steam ambient. In a more preferred embodiment, the multistep planarization method also includes a third planarization stage, after the second stage. In the third planarization stage, the flow of hydrogen is stopped while the flow of oxygen is maintained, thereby forming an oxygen ambient in the substrate processing chamber. The substrate temperature is maintained in the oxygen ambient at a temperature above the reflow temperature of the BPSG layer. It is believed that this additional step minimizes the amount of moisture incorporated into the reflowed BPSG layer.
摘要:
A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.
摘要:
A method and apparatus for processing a substrate to form a feature in low k dielectric materials. One aspect of the invention provides a method for processing a substrate including forming a feature definition in a dielectric material deposited on a surface of a substrate, depositing one or more conductive materials to fill at least a portion of the feature definition, planarizing the substrate surface to expose the dielectric material, removing at least a portion of the dielectric material, and depositing a low k dielectric material.
摘要:
A photoresist or a residue of the photoresist may by removed by the hydrogen and water plasma mixture. The process may be performed at a temperature range between about 150° C. and about 450° C., preferably about 250° C., and a power range between about 500 W and about 3000 W, preferably about 1400 W.
摘要:
A method for cleaning silicon carbide and/or organosilicate layers from interior surfaces of a process chamber is disclosed. In one aspect, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of a process chamber by treating it with a hydrogen/fluorine-based plasma. In another aspect, silicon carbide and/or organosilicate layer are cleaned from interior surfaces of the process chamber by treating it with a hydrogen-based plasma followed by a fluorine-based plasma. Alternatively, silicon carbide and/or organosilicate layers are cleaned from interior surfaces of the chamber by treating it with a fluorine-based plasma followed by a hydrogen-based plasma.
摘要:
A method of forming an organosilicate layer is disclosed. The organosilicate layer is formed by reacting a gas mixture comprising a phenyl-based alkoxysilane compound. The gas mixture may be reacted by applying an electric field thereto. The gas mixture may optionally include an organosilane compound as well as an oxidizing gas. The organosilicate layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the organosilicate layer is used as an anti-reflective coating (ARC). In another integrated circuit fabrication process, the organosilicate layer is used as a hardmask. In yet another integrated circuit fabrication process, the organosilicate layer is incorporated into a damascene structure.
摘要:
A method for improving the reflow characteristics of a BPSG film. According to the method, a fluorine- or other halogen-doped BPSG layer is deposited over a substrate and reflowed using a rapid thermal pulse (RTP) method. The use of such an RTP reflow method results in superior reflow characteristics as compared to a 20-40 minute conventional furnace reflow process. The inventors discovered that reflowing FBPSG films in a conventional furnace may result in the highly mobile fluorine atoms diffusing from the film prior to completion of the anneal. Thus, the FBPSG layer loses the improved reflow characteristics provided by the incorporation of fluorine into the film. The RTP reflow reflows the film in a minimal amount of time (e.g., 10-90 seconds depending on the temperature used to reflow the layer and the degree of planarization required among other factors). Thus, the fluorine atoms within the FBPSG layer do not have sufficient time to migrate from the layer even if the layer is deposited over a PETEOS oxide or similar layer.