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67 条记录 (耗时 0.022 秒)

    Cross-differential amplifier
    63.
    发明申请
    Cross-differential amplifier 有权
    交叉差分放大器

    公开(公告)号：US20070096828A1

    公开(公告)日：2007-05-03

    申请号：US11638639

    申请日：2006-12-12

    申请人： Seyed-Ali Hajimiri ,  Scott Kee ,  Ichiro Aoki

    发明人： Seyed-Ali Hajimiri ,  Scott Kee ,  Ichiro Aoki

    IPC分类号： H03F3/04

    CPC分类号： H03F1/0211 ,  H03F3/04 ,  H03F3/191 ,  H03F3/217 ,  H03F3/2176 ,  H03F3/45475 ,  H03F3/605 ,  H03F3/68 ,  H03F2200/507 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45464 ,  H03F2203/45704 ,  H03F2203/45731

    摘要： A cross-differential amplifier is provided. The cross-differential amplifier includes an inductor connected to a direct current power source at a first terminal. A first and second switch, such as transistors, are connected to the inductor at a second terminal. A first and second amplifier are connected at their supply terminals to the first and second switch. The first and second switches are operated to commutate the inductor between the amplifiers so as to provide an amplified signal while limiting the ripple voltage on the inductor and thus limiting the maximum voltage imposed across the amplifiers and switches.

    摘要翻译： 提供了一个交叉差分放大器。 交叉差分放大器包括在第一端子处连接到直流电源的电感器。 诸如晶体管的第一和第二开关在第二端子处连接到电感器。 第一和第二放大器在其电源端连接到第一和第二开关。 第一和第二开关被操作以在放大器之间换向电感器，以便提供放大的信号，同时限制电感器上的纹波电压，从而限制放大器和开关上施加的最大电压。

    Reconfigurable distributed active transformers
    64.
    发明申请
    Reconfigurable distributed active transformers 有权
    可重构分布式有源变压器

    公开(公告)号：US20070030071A1

    公开(公告)日：2007-02-08

    申请号：US11544895

    申请日：2006-10-06

    申请人： Abbas Komijani ,  Seyed-Ali Hajimiri ,  Scott Kee ,  Ichiro Aoki

    发明人： Abbas Komijani ,  Seyed-Ali Hajimiri ,  Scott Kee ,  Ichiro Aoki

    IPC分类号： H03F3/26

    CPC分类号： H03F3/265 ,  H03F1/223 ,  H03F3/423 ,  H03F3/602 ,  H03F3/604 ,  H03F2200/372 ,  H03F2200/421 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541

    摘要： Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.

    摘要翻译： 提供可重配置的分布式有源变压器。 提供的示例性实施例允许改变主和次级绕组的有效数量和配置，其中分布式有源变压器结构可以动态地重新配置以控制输出功率电平，允许在多个频带上操作，在多个通道上保持高性能 并保持过程，温度和其他环境变化的期望特征。 还可以提供分布式有源变压器功率放大器和低噪声放大器在半导体衬底上的集成。

    Multi-cascode transistors
    66.
    发明授权
    Multi-cascode transistors 有权
    多串联晶体管

    公开(公告)号：US06888396B2

    公开(公告)日：2005-05-03

    申请号：US10385769

    申请日：2003-03-11

    申请人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiri Aoki

    发明人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiri Aoki

    IPC分类号： H03F1/22 ,  H03F3/42 ,  H03F3/45 ,  H03K17/687

    CPC分类号： H03F3/423 ,  H03F1/22 ,  H03F1/223 ,  H03F1/226 ,  H03F3/42 ,  H03F3/45179 ,  H03F2203/45301 ,  H03F2203/45394 ,  Y10T307/832

    摘要： A cascode circuit with improved withstand voltage is provided. The cascode circuit includes three or more transistors, such as MOSFET transistors. Each transistor has a control terminal, such as a gate, and two conduction terminals, such as a drain and a source. The conduction terminals are coupled in series between two output terminals, such as where the drain of each transistor is coupled to the source of another transistor. A signal input is provided to the gate for the first transistor. Two or more control voltage sources, such as DC bias voltages, are provided to the gate of the remaining transistors. The DC bias voltages are selected so as to maintain the voltage across each transistor to a level below a breakdown voltage level.

    摘要翻译： 提供了具有改善的耐受电压的共源共栅电路。 共源共栅电路包括三个或更多个晶体管，例如MOSFET晶体管。 每个晶体管具有诸如栅极的控制端子和诸如漏极和源极的两个导电端子。 导通端子串联在两个输出端子之间，例如每个晶体管的漏极耦合到另一个晶体管的源极。 向第一晶体管的栅极提供信号输入。 将两个或更多个控制电压源（例如DC偏置电压）提供给剩余晶体管的栅极。 选择DC偏置电压以便将每个晶体管两端的电压保持在低于击穿电压电平的电平。