Invention Grant
- Patent Title: Multi-cascode transistors
- Patent Title (中): 多串联晶体管
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Application No.: US10385769Application Date: 2003-03-11
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Publication No.: US06888396B2Publication Date: 2005-05-03
- Inventor: Seyed-Ali Hajimiri , Scott D. Kee , Ichiri Aoki
- Applicant: Seyed-Ali Hajimiri , Scott D. Kee , Ichiri Aoki
- Agency: Godwin Gruber, LLP
- Agent Christopher Rourk
- Main IPC: H03F1/22
- IPC: H03F1/22 ; H03F3/42 ; H03F3/45 ; H03K17/687

Abstract:
A cascode circuit with improved withstand voltage is provided. The cascode circuit includes three or more transistors, such as MOSFET transistors. Each transistor has a control terminal, such as a gate, and two conduction terminals, such as a drain and a source. The conduction terminals are coupled in series between two output terminals, such as where the drain of each transistor is coupled to the source of another transistor. A signal input is provided to the gate for the first transistor. Two or more control voltage sources, such as DC bias voltages, are provided to the gate of the remaining transistors. The DC bias voltages are selected so as to maintain the voltage across each transistor to a level below a breakdown voltage level.
Public/Granted literature
- US20040027755A1 Reconfigurable distributed active transformers Public/Granted day:2004-02-12
Information query
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