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    Display device having variable power sources
    61.
    发明授权
    Display device having variable power sources 有权

    公开(公告)号：US11158262B2

    公开(公告)日：2021-10-26

    申请号：US16445755

    申请日：2019-06-19

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Bon Seog Gu ,  Hong Soo Kim ,  Woo Mi Bae ,  Ki Wan Ahn ,  Joo Sun Yoon ,  Chong Chul Chai

    IPC: G09G3/3258 ,  G09G3/3266 ,  G09G3/3275

    Abstract: A display device includes a display panel including pixels; a panel driver to supply a scan signal and a data signal to the pixels; and a power supply to generate a first supply voltage and a second supply voltage, and to change the first supply voltage and/or the second supply voltage to provide it to the pixels. The pixels emit light in response to the scan signal based on the data signal during an emission period where a voltage difference between the first supply voltage and the second supply voltage is larger than a first reference voltage. A first voltage difference between the first supply voltage and the second supply voltage at a start of the emission period is larger than an average voltage difference between the first supply voltage and the second supply voltage throughout the emission period.

    Organic light emitting display device and driving method thereof
    62.
    发明授权
    Organic light emitting display device and driving method thereof 有权

    公开(公告)号：US11081056B2

    公开(公告)日：2021-08-03

    申请号：US15989673

    申请日：2018-05-25

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Jun Hyun Park ,  Young Wan Seo ,  An Su Lee ,  Kang Moon Jo ,  Chong Chul Chai

    IPC: G09G3/3266 ,  G09G3/3225 ,  G09G3/3233

    Abstract: An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period.

    DISPLAY DEVICE INCLUDING SCAN DRIVER
    64.
    发明申请
    DISPLAY DEVICE INCLUDING SCAN DRIVER 有权

    公开(公告)号：US20210056909A1

    公开(公告)日：2021-02-25

    申请号：US16908903

    申请日：2020-06-23

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： KANG MOON JO ,  Chong Chul Chai ,  Young Wan Seo ,  Cheol-Gon Lee

    IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3258

    Abstract: A display device includes a substrate that includes a display area for displaying an image and a non-display area surrounding the display area, a plurality of pixels that are disposed in the display area and each include an organic light emitting diode and a pixel circuit portion configured to operate the organic light emitting diode, and a scan driver that is disposed in the non-display area and includes a plurality of stages configured to output scan signals to the plurality of pixels. The plurality of stages may be arranged in n columns, a height of one stage may correspond to a height of n pixels, and n may be an integer of 2 or more.

    Stage circuit and scan driver using the same
    65.
    发明授权
    Stage circuit and scan driver using the same 有权

    公开(公告)号：US10706784B2

    公开(公告)日：2020-07-07

    申请号：US15950516

    申请日：2018-04-11

    Applicant: Samsung Display Co., Ltd.

    Inventor： Sung Hwan Kim ,  Bon Yong Koo ,  Sun Kwang Kim ,  Chong Chul Chai

    IPC: G09G3/3266 ,  G09G3/36

    Abstract: A stage circuit includes an output circuit configured to supply, to a first output terminal, a first clock signal supplied to a second input terminal or to supply a voltage of a second power source supplied to a second power input terminal, in response to voltages of a first node and a second node, an input circuit configured to control voltages of a third node and a fourth node in response to a shift pulse or a gate start pulse supplied to a first input terminal, a third clock signal supplied to a third input terminal, and a fourth clock signal supplied to a fourth input terminal, and a first driver configured to control the voltages of the first and second nodes in response to both the third clock signal and the voltages of the third and fourth nodes.

    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME
    68.
    发明申请
    STAGE CIRCUIT AND SCAN DRIVER USING THE SAME 审中-公开
    阶段电路和扫描驱动器使用它

    公开(公告)号：US20170032756A1

    公开(公告)日：2017-02-02

    申请号：US15160922

    申请日：2016-05-20

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jong Hee Kim ,  Ji Hye Lee ,  Chong Chul Chai

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G09G3/3677 ,  G09G3/3648 ,  G09G3/3674 ,  G09G3/3696 ,  G09G2310/08 ,  G11C19/184 ,  G11C19/28

    Abstract: A stage circuit includes an output part configured to supply a carry signal to a first output terminal and a scan signal to a second output terminal, in response to a voltage of a first node, a voltage of a second node, and a first clock signal being supplied to a first input terminal, a controller configured to control the voltage of the second node in response to the first clock signal being supplied to the first input terminal, a pull-up part configured to control the voltage of the first node in response to a carry signal of a previous stage being supplied to a second input terminal, and a pull-down part configured to control the voltage of the first node in response to the voltage of the second node and the carry signal of a next stage being supplied to a third input terminal.

    Abstract translation: 舞台电路包括响应于第一节点的电压，第二节点的电压和第一时钟信号而被配置为向第一输出端子提供进位信号和扫描信号到第二输出端子的输出部分 被提供给第一输入端子的控制器，被配置为响应于提供给第一输入端子的第一时钟信号来控制第二节点的电压的控制器，被配置为响应于控制第一节点的电压的上拉部件 到前一级的进位信号被提供给第二输入端，以及下拉部，被配置为响应于所述第二节点的电压并且提供下一级的进位信号来控制所述第一节点的电压 到第三输入端。

    DISPLAY DEVICE
    69.
    发明申请
    DISPLAY DEVICE 审中-公开
    显示设备

    公开(公告)号：US20160379566A1

    公开(公告)日：2016-12-29

    申请号：US15157350

    申请日：2016-05-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae Keun Lim ,  Jong Hee Kim ,  Ji-Sun Kim ,  Young Wan Seo ,  Chong Chul Chai

    IPC: G09G3/3258 ,  G09G3/3275

    CPC classification number: G09G3/3283 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0209

    Abstract: There is provided a display device including a display including a first pixel connected to a first data line and a second pixel connected to a second data line, a data signal generator configured to generate an output signal, and a signal divider configured to divide the output signal, to generate a first data signal and a second data signal, and to apply the first data signal and the second data signal to the first data line and the second data line, respectively, wherein the data signal generator is configured to generate the output signal based on a coupling effect of a first parasitic capacitor formed between the first data line and the second data line and a coupling effect of a parasitic capacitor of a data line formed by the first data line and second data line.

    Abstract translation: 提供了一种显示装置，包括：显示器，包括连接到第一数据线的第一像素和连接到第二数据线的第二像素;数据信号发生器，被配置为产生输出信号;以及信号分配器， 信号，以产生第一数据信号和第二数据信号，并且分别将第一数据信号和第二数据信号施加到第一数据线和第二数据线，其中数据信号发生器被配置为产生输出 基于形成在第一数据线和第二数据线之间的第一寄生电容的耦合效应以及由第一数据线和第二数据线形成的数据线的寄生电容的耦合效应的信号。

    Gate circuit and display device using the same
    70.
    发明授权
    Gate circuit and display device using the same 有权
    门电路和使用其的显示装置

    公开(公告)号：US09515647B2

    公开(公告)日：2016-12-06

    申请号：US14565553

    申请日：2014-12-10

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jae Keun Lim ,  Hyun Joon Kim ,  Cheol-Gon Lee ,  Chong Chul Chai

    IPC: G09G3/36 ,  H03K17/16

    CPC classification number: H03K17/162 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

    Abstract: A gate driver includes a stage including an input unit including a first transistor diode-connected to a first input terminal of the stage through a first node and biased by a first input signal of the first input terminal, an output unit including a second transistor including a gate electrode coupled to the first node, a first electrode coupled to a clock input terminal, and a second electrode coupled to a first output terminal of the stage, a capacitor coupled between the gate electrode and the second electrode of the second transistor, and a noise remover including a third transistor including a gate electrode coupled to a second node, a first electrode coupled to the first node, and a second electrode coupled to a first voltage input terminal of the stage which receives a first voltage.

    Abstract translation: 栅极驱动器包括一个输入单元，该输入单元包括第一晶体二极管，第一晶体二极管通过第一节点连接到该级的第一输入端，并被第一输入端的第一输入信号偏置;输出单元，包括第二晶体管，包括 耦合到第一节点的栅电极，耦合到时钟输入端的第一电极和耦合到该级的第一输出端的第二电极，耦合在第二晶体管的栅电极和第二电极之间的电容器，以及 噪声去除器，包括第三晶体管，其包括耦合到第二节点的栅极电极，耦合到第一节点的第一电极和耦合到接收第一电压的级的第一电压输入端子的第二电极。

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