Abstract:
A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.
Abstract:
A storage transistor with a storage region is disposed in a semiconductor material. A gate electrode is disposed in a bottom side of an interlayer proximate to the storage region, and a dielectric layer is disposed between the storage region and the gate electrode. An optical isolation structure is disposed in the interlayer and the optical isolation structure extends from a top side of the interlayer to the gate electrode. The optical isolation structure is also adjoining a perimeter of the gate electrode and contacts the gate electrode. A capping layer is disposed proximate to the top side of the interlayer and the capping layer caps a volume encircled by the optical isolation structure.
Abstract:
Techniques and mechanisms for generating a random number. In an embodiment, a first signal is received from a first cell including a first source follower transistor. Circuit logic detects for a pulse of the first signal and, in response to the pulse, generates a signal indicating detection of a first random telegraph noise event in the first source follower transistor. In another embodiment, a first count update is performed in response to the indicated detection of the first random telegraph noise event. The first count update is one basis for generation of a number corresponding to a plurality of random telegraph noise events.
Abstract:
An image sensor includes a plurality of photodiodes disposed proximate to a frontside of a first semiconductor layer to accumulate image charge in response to light directed into the frontside of the first semiconductor layer. A plurality of pinning wells is disposed in the first semiconductor layer. The pinning wells separate individual photodiodes included in the plurality of photodiodes. A plurality of dielectric layers is disposed proximate to a backside of the first semiconductor layer. The dielectric layers are tuned such that light having a wavelength substantially equal to a first wavelength included in the light directed into the frontside of the first semiconductor layer is reflected from the dielectric layers back to a respective one of the plurality of photodiodes disposed proximate to the frontside of the first semiconductor layer.
Abstract:
A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.
Abstract:
An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the first polarity charge layer.
Abstract:
An image sensor includes a pixel array with a plurality of pixels arranged in a semiconductor layer. A color filter array including a plurality of groupings of filters is disposed over the pixel array. Each filter is optically coupled to a corresponding one of the plurality pixels. Each one of the plurality of groupings of filters includes a first, a second, a third, and a fourth filter having a first, a second, the second, and a third color, respectively. A metal layer is disposed over the pixel array and is patterned to include a metal mesh having mesh openings with a size and pitch to block incident light having a fourth color from reaching the corresponding pixel. The metal layer is patterned to include openings without the metal mesh to allow the incident light to reach the other pixels.
Abstract:
An image sensor includes a plurality of photosensitive devices arranged in a semiconductor substrate. A planar layer is disposed over the plurality of photosensitive devices in the semiconductor substrate. A plurality of first microlenses comprised of a lens material is arranged in first lens regions on the planar layer. A plurality of lens barriers comprised of the lens material is arranged on the planar layer to provide boundaries that define second lens regions on the planar layer. A plurality of second microlenses comprised of the lens material is formed within the boundaries provided by the plurality of lens barriers that define the second lens regions on the planar layer. The plurality of lens barriers are integrated with respective second microlenses after a reflow process of the plurality of second microlenses.
Abstract:
An image sensor for capturing both visible light images and infrared light images includes a semiconductor substrate having length, width, and height, a plurality of visible light photodetectors disposed in the semiconductor substrate, and a plurality of combination light photodetectors disposed in the semiconductor substrate. Each of the plurality of visible light photodetectors has a respective depth in the height direction, and each of the plurality of combination light photodetectors has a respective depth in the height direction that is greater than the respective depth of each of the plurality of visible light photodetectors.
Abstract:
Embodiments of an apparatus comprising a pixel array including a plurality of pixels formed in a substrate having a front surface and a back surface, each pixel including a photosensitive region formed at or near the front surface and extending into the substrate a selected depth from the front surface. A filter array is coupled to the pixel array, the filter array including a plurality of individual filters each optically coupled to a corresponding photosensitive region, and a vertical overflow drain (VOD) is positioned in the substrate between the back surface and the photosensitive region of at least one pixel in the array.