公开(公告)号：US09906801B2

公开(公告)日：2018-02-27

申请号：US15139345

申请日：2016-04-27

Applicant: MEDIATEK INC.

Inventor： Min-Hao Chiu ,  Chia-Yun Cheng ,  Chun-Chia Chen

IPC: H04N19/176 ,  H04N19/129 ,  H04N19/12 ,  H04N19/124 ,  H04N19/122 ,  H04N19/13

CPC classification number: H04N19/176 ,  H04N19/12 ,  H04N19/122 ,  H04N19/124 ,  H04N19/129 ,  H04N19/13

Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.

公开(公告)号：US09813739B2

公开(公告)日：2017-11-07

申请号：US15468132

申请日：2017-03-24

Applicant: MEDIATEK INC.

Inventor： Sheng-Jen Wang ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04N19/10 ,  H04N19/91 ,  H04N19/423

CPC classification number: H04N19/91 ,  H04N19/423

Abstract: A backward adaptation apparatus includes a first storage apparatus, a count table maintenance apparatus, and a backward probability update circuit. The first storage apparatus has a first buffer and a second buffer allocated therein. The first buffer stores a first probability table involved in processing of a first frame. The second buffer stores a second probability table selectable for processing of a second frame following the first frame. The count table maintenance apparatus maintains a count table, wherein the count table maintenance apparatus has at least one count data updating circuit shared for dynamically updating the count table during the processing of the first frame. The backward probability update circuit refers to information of the count table and information of the first probability table to calculate the second probability table in the second buffer at an end of the processing of the first frame.

公开(公告)号：US20170223349A1

公开(公告)日：2017-08-03

申请号：US15422425

申请日：2017-02-01

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Han-Liang Chou ,  Yung-Chang Chang

IPC: H04N19/10 ,  H04L1/00 ,  H04N19/15

CPC classification number: H04N19/10 ,  H04L1/0018 ,  H04N19/15 ,  H04N19/182 ,  H04N19/423 ,  H04N19/436

Abstract: A video transmitting system includes a source buffer, a video encoder, a bitstream buffer, and a transmitting circuit. The source buffer receives pixel data of pixels of a video frame. The video encoder retrieve pixel data of a portion of the pixels of the video frame from the source buffer, and starts encoding the pixel data of the portion of the pixels before pixel data of a last pixel of the video frame is received by the source buffer. The bitstream buffer receives a network abstraction layer (NAL) stream from the video encoder, wherein the NAL stream is generated by encoding the pixel data of the portion of the pixels. The transmitting circuit retrieves the NAL stream from the bitstream buffer, and starts outputting the NAL stream before the pixel data of the last pixel of the video frame is encoded by the video encoder.

公开(公告)号：US09641854B2

公开(公告)日：2017-05-02

申请号：US14712900

申请日：2015-05-14

Applicant: MEDIATEK INC.

Inventor： Sheng-Jen Wang ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04N19/10 ,  H04N19/423 ,  H04N19/91

CPC classification number: H04N19/91 ,  H04N19/423

Abstract: A count table maintenance apparatus for maintaining a count table referenced to apply a backward adaptation to a probability table. The count table maintenance apparatus includes a count data access interface, at least one buffer, and at least one count data updating circuit. The count data access interface determines a read address and a write address of the storage apparatus. The at least one buffer buffers at least one input count data, wherein the at least one input count data is derived from count data read from the count table according to the read address. The at least one count data updating circuit updates the at least one input count data read from the at least one buffer to generate at least one updated count data, and store the at least one updated count data into the storage apparatus according to the write address.

公开(公告)号：US09319677B2

公开(公告)日：2016-04-19

申请号：US14165599

申请日：2014-01-28

Applicant: MEDIATEK INC.

Inventor： Yung-Chang Chang ,  Chia-Yun Cheng ,  Chi-Cheng Ju

IPC: H04N7/12 ,  H04N19/44 ,  H04N19/423 ,  H04N19/433 ,  H04N19/59 ,  H04N19/577

CPC classification number: H04N19/00533 ,  H04N19/423 ,  H04N19/433 ,  H04N19/44 ,  H04N19/577 ,  H04N19/59

Abstract: A video decoding method for decoding a bit stream to a plurality of frames, applied in a video decoding system, includes: determining whether a size of a current picture is equal to that of a next picture according to the bit stream; scaling a corresponding reference frame for the next picture to generate a scaled frame when the size of the current picture is not equal to that of the next picture; and storing the scaled frame in a first buffer of a storage unit, wherein at least a portion of a first frame originally stored in the first buffer is used; wherein when it is determined that the size of the current picture is not equal to that of the next picture, the next picture is encoded in the bit stream in a mode that the scaled corresponding reference frame is required for decoding the next picture.

Abstract translation: 一种视频解码方法，用于将应用于视频解码系统的比特流解码为多个帧，包括：根据比特流确定当前图像的大小是否等于下一图像的大小; 当当前图像的大小不等于下一图像的大小时，缩放下一图像的对应参考帧以产生缩放帧; 并且将缩放的帧存储在存储单元的第一缓冲器中，其中使用原始存储在第一缓冲器中的第一帧的至少一部分; 其中当确定当前画面的尺寸不等于下一画面的尺寸时，下一画面以对于下一画面进行解码所需的缩放对应的参考帧的模式被编码在比特流中。

公开(公告)号：US20150350673A1

公开(公告)日：2015-12-03

申请号：US14716904

申请日：2015-05-20

Applicant: MEDIATEK INC.

Inventor： Meng-Jye Hu ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04N19/593 ,  H04N19/55 ,  H04N19/51 ,  H04N19/563

CPC classification number: H04N19/593 ,  H04N19/423 ,  H04N19/44 ,  H04N19/51 ,  H04N19/55 ,  H04N19/563

Abstract: A video processing apparatus includes a reconstruct circuit, a storage device, and an intra prediction circuit. The reconstruct circuit generates reconstructed pixels of a first block of a picture. The storage device at least stores a portion of the reconstructed pixels of the first block, wherein a capacity of the storage device is smaller than a reconstructed data size of the picture. The intra prediction circuit performs intra prediction of a second block of the picture based at least partly on pixel data obtained from the storage device.

Abstract translation: 视频处理装置包括重建电路，存储装置和帧内预测电路。 重建电路产生图像的第一块的重建像素。 存储装置至少存储第一块的重建像素的一部分，其中存储装置的容量小于图像的重构数据大小。 帧内预测电路至少部分地基于从存储装置获得的像素数据，对图像的第二块进行帧内预测。

公开(公告)号：US20150334387A1

公开(公告)日：2015-11-19

申请号：US14712900

申请日：2015-05-14

Applicant: Mediatek Inc.

Inventor： Sheng-Jen Wang ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04N19/10

CPC classification number: H04N19/91 ,  H04N19/423

Abstract: A count table maintenance apparatus for maintaining a count table referenced to apply a backward adaptation to a probability table. The count table maintenance apparatus includes a count data access interface, at least one buffer, and at least one count data updating circuit. The count data access interface determines a read address and a write address of the storage apparatus. The at least one buffer buffers at least one input count data, wherein the at least one input count data is derived from count data read from the count table according to the read address. The at least one count data updating circuit updates the at least one input count data read from the at least one buffer to generate at least one updated count data, and store the at least one updated count data into the storage apparatus according to the write address.

Abstract translation: 一种计数表维护装置，用于维持参考的计数表以对概率表应用反向适配。 计数表维护装置包括计数数据访问接口，至少一个缓冲器和至少一个计数数据更新电路。 计数数据访问接口确定存储装置的读取地址和写入地址。 至少一个缓冲器缓冲至少一个输入计数数据，其中根据读取的地址从计数表读出的计数数据导出至少一个输入计数数据。 所述至少一个计数数据更新电路更新从所述至少一个缓冲器读取的所述至少一个输入计数数据以生成至少一个更新的计数数据，并且根据所述写入地址将所述至少一个更新的计数数据存储到所述存储装置中 。

公开(公告)号：US20140233649A1

公开(公告)日：2014-08-21

申请号：US14179540

申请日：2014-02-12

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Huei-Min Lin ,  Yung-Chang Chang

IPC: H04N19/86 ,  H04N19/583 ,  H04N19/436 ,  H04N19/82

CPC classification number: H04N19/865 ,  H04N19/436 ,  H04N19/51 ,  H04N19/82

Abstract: A method and apparatus for deblocking process using multiple processing units are disclosed. The video image is divided into at least two regions. The in-loop filter is applied to block boundaries associated with said at least two regions using multiple processing units. The in-loop filter is re-applied to one or more second block boundaries adjacent to region edge between two regions after applying the in-loop filter to the first block boundaries adjacent to the region edge. Furthermore, at least a first portion of said applying the in-loop filter to the first block boundaries and a second portion of said applying the in-loop filter to the second block boundaries are performed concurrently. The multiple processing units may correspond to multiple processing cores within one processor chip.

Abstract translation: 公开了一种使用多个处理单元去块处理的方法和装置。 视频图像被分成至少两个区域。 使用多个处理单元将环路滤波器应用于与所述至少两个区域相关联的块边界。 在将环路滤波器应用于与区域边缘相邻的第一块边界之后，将环路滤波器重新应用于与两个区域之间的区域边缘相邻的一个或多个第二块边界。 此外，同时执行将所述环路滤波器应用于所述第一块边界的所述至少第一部分和将所述环路滤波器应用于所述第二块边界的第二部分。 多个处理单元可以对应于一个处理器芯片内的多个处理核心。