知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

117 条记录 (耗时 0.043 秒)

    Method for symmetric capacitor formation
    61.
    发明授权
    Method for symmetric capacitor formation 有权
    对称电容器形成方法

    公开(公告)号：US07402890B2

    公开(公告)日：2008-07-22

    申请号：US11421774

    申请日：2006-06-02

    申请人： David S. Collins ,  Hanyi Ding ,  Kai Di Feng ,  Zhong-Xiang He ,  Xuefeng Liu

    发明人： David S. Collins ,  Hanyi Ding ,  Kai Di Feng ,  Zhong-Xiang He ,  Xuefeng Liu

    IPC分类号： H01L29/00

    CPC分类号： H01L27/0805

    摘要： A structure and associated method for forming a structure. The structure comprises a first doped region, a second doped region, a third doped region, and a first shallow trench isolation structure formed within a substrate. The first doped region comprises a first dopant having a first polarity. The second doped region forms a first electrode of a capacitor. The third doped region forms a second electrode of the capacitor. Each of the second doped region and the third doped region comprises a second dopant having a second polarity. The first shallow trench isolation structure is formed between the second doped region and the third doped region. The capacitor comprises a main capacitance. The structure comprises a first parasitic capacitance and a second parasitic capacitance. The first parasitic capacitance is about equal to the second parasitic capacitance.

    摘要翻译： 用于形成结构的结构和相关联的方法。 该结构包括形成在衬底内的第一掺杂区域，第二掺杂区域，第三掺杂区域和第一浅沟槽隔离结构。 第一掺杂区域包括具有第一极性的第一掺杂剂。 第二掺杂区域形成电容器的第一电极。 第三掺杂区域形成电容器的第二电极。 第二掺杂区域和第三掺杂区域中的每一个包括具有第二极性的第二掺杂剂。 第一浅沟槽隔离结构形成在第二掺杂区和第三掺杂区之间。 电容器包括主电容。 该结构包括第一寄生电容和第二寄生电容。 第一寄生电容约等于第二寄生电容。

    Microelectronic device with mixed dielectric
    62.
    发明申请
    Microelectronic device with mixed dielectric 有权
    具有混合电介质的微电子器件

    公开(公告)号：US20070169959A1

    公开(公告)日：2007-07-26

    申请号：US11338402

    申请日：2006-01-24

    申请人： Hanyi Ding ,  Brian Welch

    发明人： Hanyi Ding ,  Brian Welch

    IPC分类号： H05K1/16

    CPC分类号： H05K1/024 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/115 ,  H05K2201/0187 ,  H05K2201/0792 ,  H05K2201/09581 ,  H01L2924/00

    摘要： A microelectronic device and method of making the microelectronic device is provided. A dielectric substrate having first and second surfaces is provided. A first component, located in the dielectric substrate between the first and second surfaces of the dielectric substrate is formed. The first component includes a first interface and a second interface. A second component located in the dielectric substrate and spaced relative to the first component is formed, and a first low permittivity material is formed having a predetermined thickness and a first and second surface, the first surface of the low permittivity material is adjacent to or in contact with a first portion of the first interface of the first component. The first low permittivity material substantially reduces capacitive parasitics of the first component, resulting in a substantially higher characteristic impedance of the first component during operation of the microelectronic device.

    摘要翻译： 提供微电子器件和制造微电子器件的方法。 提供具有第一和第二表面的电介质基片。 形成位于电介质基板之间的电介质基板的第一和第二表面之间的第一部件。 第一组件包括第一接口和第二接口。 形成位于电介质基板中并相对于第一部件间隔开的第二部件，并且形成具有预定厚度的第一低介电常数材料和第一和第二表面，低介电常数材料的第一表面邻近或位于 与第一部件的第一界面的第一部分接触。 第一低介电常数材料显着地减小了第一部件的电容寄生效应，导致在微电子器件工作期间第一部件的特征阻抗基本上更高。

    ON-CHIP SIGNAL TRANSFORMER FOR GROUND NOISE ISOLATION
    63.
    发明申请
    ON-CHIP SIGNAL TRANSFORMER FOR GROUND NOISE ISOLATION 有权
    用于接地噪声隔离的片上信号变压器

    公开(公告)号：US20060148106A1

    公开(公告)日：2006-07-06

    申请号：US10905480

    申请日：2005-01-06

    申请人： Hanyi Ding ,  Kai Feng ,  Zhong-Xiang He ,  Xuefeng Liu

    发明人： Hanyi Ding ,  Kai Feng ,  Zhong-Xiang He ,  Xuefeng Liu

    IPC分类号： H01L21/00

    CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F41/046 ,  H01F2019/085 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A mixed-signal chip having a signal transformer located between analog circuitry and digital circuitry. The signal transformer includes a primary winding electrically coupled to the analog circuitry and a secondary winding electrically coupled to the digital circuitry. The primary and secondary windings are magnetically coupled with one another via a magnetic core. The magnetic coupling between the primary and secondary windings inhibits the coupling of electrical noise between the analog and digital circuitries.

    摘要翻译： 混合信号芯片，具有位于模拟电路和数字电路之间的信号变压器。 信号变压器包括电耦合到模拟电路的初级绕组和电耦合到数字电路的次级绕组。 初级和次级绕组通过磁芯彼此磁耦合。 初级和次级绕组之间的磁耦合阻碍了模拟和数字电路之间的电气噪声耦合。

    Reconfigurable Wilkinson power divider and design structure thereof
    65.
    发明授权
    Reconfigurable Wilkinson power divider and design structure thereof 有权
    可重构Wilkinson功率分配器及其设计结构

    公开(公告)号：US08791771B2

    公开(公告)日：2014-07-29

    申请号：US13298489

    申请日：2011-11-17

    申请人： Hanyi Ding ,  Guoan Wang ,  Wayne H. Woods, Jr. ,  Jiansheng Xu

    发明人： Hanyi Ding ,  Guoan Wang ,  Wayne H. Woods, Jr. ,  Jiansheng Xu

    IPC分类号： H01P5/12 ,  H03L5/00

    CPC分类号： H01P5/16

    摘要： A reconfigurable Wilkinson power divider, methods of manufacture and design structures are provided. The structure includes a first port, and a first arm and a second arm connected to the first port. The first arm and the second arm each include one or more tunable t-line circuits. The structure also includes a second port and a third port connected to the first port via the first arm and second arm, respectively.

    摘要翻译： 提供可重构的Wilkinson功率分配器，制造和设计结构的方法。 该结构包括第一端口和连接到第一端口的第一臂和第二臂。 第一臂和第二臂各包括一个或多个可调t线电路。 该结构还包括分别经由第一臂和第二臂连接到第一端口的第二端口和第三端口。

    Structure and design structure for high-Q value inductor and method of manufacturing the same
    66.
    发明授权
    Structure and design structure for high-Q value inductor and method of manufacturing the same 有权
    高Q值电感器的结构和设计结构及其制造方法

    公开(公告)号：US08645898B2

    公开(公告)日：2014-02-04

    申请号：US13535412

    申请日：2012-06-28

    申请人： Hanyi Ding ,  Mete Erturk ,  Robert A. Groves ,  Zhong-Xiang He ,  Peter J. Lindgren ,  Anthony K. Stamper

    发明人： Hanyi Ding ,  Mete Erturk ,  Robert A. Groves ,  Zhong-Xiang He ,  Peter J. Lindgren ,  Anthony K. Stamper

    IPC分类号： G06F17/50 ,  H01L27/08

    CPC分类号： H01L28/10 ,  H01L21/76898 ,  H01L23/5227 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

    摘要： Structures with high-Q value inductors, design structure for high-Q value inductors and methods of fabricating such structures is disclosed herein. A method in a computer-aided design system for generating a functional design model of an inductor is also provided. The method includes: generating a functional representation of a plurality of vertical openings simultaneously formed in a substrate, wherein a first of the plurality of vertical openings is used as through silicon vias and is etched deeper than a second of the plurality of vertical openings used for high-Q inductors; generating a functional representation of a dielectric layer formed in the plurality of vertical openings; and generating a functional representation of a metal layer deposited on the dielectric layer in the plurality of vertical.

    摘要翻译： 具有高Q值电感器的结构，高Q值电感器的设计结构和制造这种结构的方法在本文中公开。 还提供了一种用于产生电感器的功能设计模型的计算机辅助设计系统中的方法。 该方法包括：产生同时形成在衬底中的多个垂直开口的功能表示，其中多个垂直开口中的第一个用作通过硅通孔，并且被蚀刻比用于多个垂直开口 高Q电感; 产生形成在所述多个垂直开口中的电介质层的功能性表示; 以及生成沉积在所述多个垂直方向上的所述电介质层上的金属层的功能表示。

    Integrated circuit interconnect structure
    67.
    发明授权
    Integrated circuit interconnect structure 失效
    集成电路互连结构

    公开(公告)号：US08446014B2

    公开(公告)日：2013-05-21

    申请号：US13531008

    申请日：2012-06-22

    申请人： Hanyi Ding ,  Ronald G. Filippi ,  Jong-Ru Guo ,  Ping-Chuan Wang

    发明人： Hanyi Ding ,  Ronald G. Filippi ,  Jong-Ru Guo ,  Ping-Chuan Wang

    IPC分类号： H01L23/48

    CPC分类号： H01L23/528 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit (IC) interconnect structure that includes a first via positioned in a dielectric and coupled to a high current device at one end, and a buffer metal segment positioned in a dielectric and coupled to the first via at an opposite end thereof. The buffer metal segment includes a plurality of electrically insulating inter-dielectric (ILD) pads forming an ILD cheesing pattern thereon, to direct current. The IC interconnect structure further includes a second via positioned in a dielectric formed over the buffer metal segment and coupled to the buffer metal segment at one end and a metal power line formed in a dielectric and coupled to the second via at an opposite end thereof. The use of the ILD pads on the buffer metal segment enables a more even distribution of current along the metal power line.

    摘要翻译： 一种集成电路（IC）互连结构，其包括位于电介质中并且在一端耦合到高电流器件的第一通孔和位于电介质中的缓冲金属段，并在其相对端耦合到第一通孔。 缓冲金属段包括在其上形成ILD干酪糖化图案的多个电绝缘介电层（ILD）焊盘以引导电流。 IC互连结构还包括位于介质上的第二通孔，该电介质形成在缓冲金属段上并且在一端耦合到缓冲金属段，并且金属电源线形成在电介质中，并在其相对端耦合到第二通孔。 缓冲金属片段上的ILD焊盘的使用使得能够沿着金属电源线更均匀地分布电流。

    T-connections, methodology for designing T-connections, and compact modeling of T-connections
    69.
    发明授权
    T-connections, methodology for designing T-connections, and compact modeling of T-connections 失效
    T型连接，T型连接的设计方法和T型连接的紧凑建模

    公开(公告)号：US08413098B2

    公开(公告)日：2013-04-02

    申请号：US12431887

    申请日：2009-04-29

    申请人： Hanyi Ding ,  Essam Mina ,  Guoan Wang ,  Wayne Harvey Woods, Jr.

    发明人： Hanyi Ding ,  Essam Mina ,  Guoan Wang ,  Wayne Harvey Woods, Jr.

    IPC分类号： G06F17/50

    CPC分类号： H01L23/5225 ,  G06F17/5036 ,  G06F17/5063 ,  G06F17/5072 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

    摘要： T-connections, methodology for designing T-connections, and compact modeling of T-connections. The T-connections include an electrically conductive T-junction comprising a body and first, second and third integral arms projecting from mutually perpendicular sides of the body, each arm of the three integral arms having a same first width abutting the body and a same length extending away from the body; an electrically conductive step-junction comprising a first section having the first width and an integral and abutting second section having a second width, the second width different from the first width, the first section smoothly abutting and integral with the first arm of the T-junction; and wherein top surfaces of the T-junction and the step-junction are coplanar.

    摘要翻译： T型连接，T型连接的设计方法和T型连接的紧凑建模。 T形连接件包括一个导电T形接头，它包括主体和从本体的相互垂直的侧面突出的第一，第二和第三整体臂，三个整体臂的每个臂具有与主体相邻的相同的第一宽度和相同的长度 远离身体; 导电性阶梯结，其包括具有第一宽度的第一部分和具有第二宽度的整体和邻接的第二部分，所述第二宽度不同于所述第一宽度，所述第一部分平滑地抵接并与所述第二部分 交界处 并且其中T形结和台阶结的顶表面是共面的。