公开(公告)号：US08754666B2

公开(公告)日：2014-06-17

申请号：US12052823

申请日：2008-03-21

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Yun-Hsin Liao ,  Daniel Peter Morris ,  Da-Yuan Shih

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Yun-Hsin Liao ,  Daniel Peter Morris ,  Da-Yuan Shih

IPC: G01R1/067

CPC classification number: G01R1/07307 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/06772 ,  G01R1/07342 ,  G01R1/07371 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L25/0652 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/78301 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1627 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: Structures having a plurality of discrete insulated elongated electrical conductors projecting from a support surface which are useful as probes for testing of electrical interconnections to electronic devices, such as integrated circuit devices and other electronic components and particularly for testing of integrated circuit devices with rigid interconnection pads and multi-chip module packages with high density interconnection pads and the apparatus for use thereof and to methods of fabrication thereof. Coaxial probe structures are fabricated by the methods described providing a high density coaxial probe.

Abstract translation: 具有从支撑表面突出的多个离散绝缘细长电导体的结构，其可用作用于测试电子装置（例如集成电路装置和其它电子部件）的电互连的探针，特别是用于测试具有刚性互连垫的集成电路装置 以及具有高密度互连焊盘的多芯片模块封装及其使用的装置及其制造方法。 通过提供高密度同轴探针的方法制造同轴探针结构。

公开(公告)号：US20140158403A1

公开(公告)日：2014-06-12

申请号：US14106120

申请日：2013-12-13

Applicant: Brian Samuel Beaman

Inventor： Brian Samuel Beaman

IPC: H05K1/11

CPC classification number: H05K1/117 ,  H01R12/721 ,  H05K3/403 ,  H05K2201/09145 ,  H05K2201/09909 ,  H05K2201/10863 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: A printed circuit board assembly and method of assembly is provided for a printed circuit board having a top and bottom surface with at least one edge portion having a rounded surface extending from the top surface to a point below the top surface and at least one electrical contact pad located on the top surface and extending over the edge portion rounded surface to a point below the top surface.

Abstract translation: 为具有顶表面和底表面的印刷电路板组件和组装方法提供了一种印刷电路板，该印刷电路板具有顶表面和底表面，其中至少一个边缘部分具有从顶表面延伸到顶表面下方的点的圆形表面， 垫位于顶部表面上并且在边缘部分圆形表面上延伸到顶部表面下方的点。

公开(公告)号：US20100052715A1

公开(公告)日：2010-03-04

申请号：US12548537

申请日：2009-08-27

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

IPC: G01R31/02 ,  G01R1/06

CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20100045320A1

公开(公告)日：2010-02-25

申请号：US12548567

申请日：2009-08-27

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

IPC: G01R31/02 ,  G01R1/06

CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20090128176A1

公开(公告)日：2009-05-21

申请号：US12357686

申请日：2009-01-22

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shin ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shin ,  George Frederick Walker

IPC: G01R1/067 ,  G01R31/02

CPC classification number: G01R1/07371 ,  G01R1/06711 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07314 ,  G01R1/07342 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2924/00013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3011 ,  Y10S29/029 ,  Y10T29/49004 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49158 ,  Y10T29/49162 ,  Y10T29/49192 ,  Y10T29/53174 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

Abstract translation: 本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体设置在模具中以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

公开(公告)号：US07530853B2

公开(公告)日：2009-05-12

申请号：US11865103

申请日：2007-10-01

Applicant: Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

Inventor： Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

IPC: H01R24/00

CPC classification number: H01R13/533 ,  H01R12/716 ,  Y10T29/49222

Abstract: The illustrative embodiments provide a socket, a method for manufacturing the socket, a device, and a method for compensating for a difference in the coefficients of thermal expansion between a socket and a printed circuit board. The socket includes surface mounted contacts and an elongated housing. The elongated housing comprises an aperture, wherein the surface mounted contacts extend from the aperture. At least one plate connects to the elongated housing, wherein the at least one plate has a coefficient of thermal expansion selected to compensate for a difference in coefficients of thermal expansion between the socket and a printed circuit board.

Abstract translation: 说明性实施例提供插座，用于制造插座的方法，装置和用于补偿插座和印刷电路板之间的热膨胀系数的差异的方法。 插座包括表面安装的触点和细长的外壳。 细长壳体包括孔，其中表面安装的接触件从孔径延伸。 至少一个板连接到细长壳体，其中至少一个板具有选择的热膨胀系数以补偿插座和印刷电路板之间的热膨胀系数差。

公开(公告)号：US07472477B2

公开(公告)日：2009-01-06

申请号：US11548797

申请日：2006-10-12

Applicant: Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

Inventor： Brian Samuel Beaman ,  Joseph Kuczynski ,  Theron Lee Lewis ,  Amanda Elisa Ennis Mikhail ,  Arvind Kumar Sinha

IPC: H05K3/34

CPC classification number: H01R12/7052 ,  H01R12/714 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49208 ,  Y10T29/53174 ,  Y10T29/53265

Abstract: The illustrative embodiments provide a method for manufacturing a socket and attaching the socket to a printed circuit board. Surface mounted contacts for a bottom surface of a socket are provided. The surface mounted contacts are a plurality of conductive metal pads that directly attach to surface connections on a printed circuit board. An elongated housing is formed comprising at least two members that are coupled together and disposed to form an aperture in between the at least two members. At least one dimension of the at least two members is selected to compensate for a difference between coefficients of thermal expansion between the socket and the printed circuit board. The at least two members and the surface mounted contacts are aligned with the printed circuit board using a clip. In response to completing a solder reflow process, the clip is removed and a module is inserted into the aperture.

Abstract translation: 说明性实施例提供了制造插座并将插座连接到印刷电路板的方法。 提供了用于底座表面的表面安装的触点。 表面安装的触点是直接连接到印刷电路板上的表面连接的多个导电金属焊盘。 细长的壳体形成为包括至少两个构件，所述至少两个构件联接在一起并且设置成在所述至少两个构件之间形成孔。 选择至少两个构件的至少一个尺寸以补偿插座和印刷电路板之间的热膨胀系数之间的差异。 使用夹子将至少两个构件和表面安装的触点与印刷电路板对准。 响应于完成焊料回流工艺，夹子被移除并且模块插入孔中。

公开(公告)号：US20080129319A1

公开(公告)日：2008-06-05

申请号：US11930033

申请日：2007-10-30

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

IPC: G01R31/02

CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

Abstract translation: 本发明涉及一种高密度测试探针，其提供用于测试晶片形式的高密度和高性能集成电路或作为离散芯片的装置。 测试探针由嵌入柔性或高模量弹性体材料的细长电导体的密集阵列形成。 使用陶瓷集成电路芯片封装基板等标准封装基板来提供空间变压器。 电线被连接到空间变压器表面上的接触焊盘阵列。 空间变压器由多层集成电路芯片封装基板形成。 电线与接触位置阵列一样密集。 围绕着向外突出的线的阵列设置模具。 液体弹性体设置在模具中以填充电线之间的空间。 弹性体被固化并且模具被去除，留下布置在弹性体中并且与空间变压器电接触的线阵列。空间变压器可以具有一组引脚，这些引脚位于空间变压器的相反表面上， 其中细长导体被接合。 这些销插入第二空间变压器（例如印刷电路板）上的插座中以形成探针组件。 或者，插入器电连接器可以设置在第一和第二空间变压器之间。

公开(公告)号：US20080116915A1

公开(公告)日：2008-05-22

申请号：US11929821

申请日：2007-10-30

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

IPC: G01R1/073

CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

公开(公告)号：US20080112148A1

公开(公告)日：2008-05-15

申请号：US11929999

申请日：2007-10-30

Applicant: Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

Inventor： Brian Samuel Beaman ,  Keith Edward Fogel ,  Paul Alfred Lauro ,  Maurice Heathcote Norcott ,  Da-Yuan Shih ,  George Frederick Walker

IPC: H05K7/06 ,  G01R31/26 ,  H05K1/02

CPC classification number: G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.