公开(公告)号：US11698669B2

公开(公告)日：2023-07-11

申请号：US17412230

申请日：2021-08-25

Applicant: Apple Inc.

Inventor： Keith Cox ,  Jamie L. Langlinais ,  Inder M. Sodhi

IPC: G06F1/26 ,  H02M3/155 ,  H02M1/00

CPC classification number: G06F1/26 ,  H02M3/155 ,  G06F1/263 ,  H02M1/007 ,  H02M1/0067

Abstract: A hierarchical, scalable power delivery system is disclosed. The power delivery system includes a first level of power converter circuitry configured to generate one or more first level regulated supply voltages, and a second level of power converter circuitry configured to generate one or more second level regulated supply voltages. The first level of power converter circuitry receives an input supply voltage, while the second level power converter circuitry receives the one or more first level supply voltages. The second level power converter circuitry is configured to provide the second level regulated supply voltages to a computing element configured to operate as a single, logical computer system, the computing element being configured to operate in a number of power configurations having differing numbers of load circuits. Different portions of the hierarchical power delivery system may be selectively enabled for corresponding ones of the power configurations of the computing element.

公开(公告)号：US20230101217A1

公开(公告)日：2023-03-30

申请号：US17573268

申请日：2022-01-11

Applicant: Apple Inc.

Inventor： Doron Rajwan ,  Inder M. Sodhi ,  Keith Cox ,  Jung Wook Cho ,  Kevin I. Park ,  Tal Kuzi

IPC: G06F1/3296 ,  G06F1/324 ,  G06F1/3234

Abstract: In an embodiment, a system may include a plurality of component circuits. The plurality of component circuits may include rate control circuits the control power consumption in the component circuits based on indications of power allocated to the component circuits. In an embodiment, the rate control circuits may transmit power requests for the component circuits and a floor request representing a minimum amount of power that may ensure reliable operation.

公开(公告)号：US20230069344A1

公开(公告)日：2023-03-02

申请号：US17676665

申请日：2022-02-21

Applicant: Apple Inc.

Inventor： Jamie L. Langlinais ,  Inder M. Sodhi ,  Lior Zimet ,  Keith Cox

IPC: G06F1/3296 ,  G06F1/3206

Abstract: Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Different sets of power delivery trigger circuits may be coupled to the integrated circuit by wiring or serial communication interfaces. Power reduction responses may be implemented at faster rates utilizing the wired power delivery trigger circuits while slower power reduction response can be implemented utilizing serially connected power delivery trigger circuits. The threshold for power reduction response by wired power delivery trigger circuits may also be closer to a functional failure point of the integrated circuit in order to provide fast response to avoid failure of the integrated circuit.

公开(公告)号：US11121711B2

公开(公告)日：2021-09-14

申请号：US17008559

申请日：2020-08-31

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: H03K5/00 ,  H03K19/0175 ,  H03K5/01 ,  G11C5/14 ,  H02J1/08

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US10895903B2

公开(公告)日：2021-01-19

申请号：US16266248

申请日：2019-02-04

Applicant: Apple Inc.

Inventor： James S. Ismail ,  John M. Ananny ,  John G. Dorsey ,  Bryan R. Hinch ,  Aditya Venkataraman ,  Keith Cox ,  Inder M. Sodhi ,  Achmed R. Zahir

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3234 ,  G06F1/20 ,  G06F1/3206 ,  G01R21/133

Abstract: In an embodiment, an electronic device includes a package power zone controller. The device monitors the overall power consumption of multiple components of a “package.” The package power zone controller may detect workloads in which the package components (e.g. different types of processors, peripheral hardware, etc.) are each consuming relatively low levels of power, but the overall power consumption is greater than a desired target. The package power zone controller may implement various mechanisms to reduce power consumption in such cases.

公开(公告)号：US10483974B2

公开(公告)日：2019-11-19

申请号：US16140488

申请日：2018-09-24

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: G11C5/04 ,  H03K5/01 ,  H03K19/0175 ,  G11C5/14 ,  H03K5/00 ,  H02J1/00

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US20190052271A1

公开(公告)日：2019-02-14

申请号：US16140488

申请日：2018-09-24

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J. Rohrer

IPC: H03K19/0175 ,  H03K5/01 ,  G11C5/14 ,  H02J1/00 ,  H03K5/00

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US10084450B1

公开(公告)日：2018-09-25

申请号：US15671524

申请日：2017-08-08

Applicant: Apple Inc.

Inventor： Keith Cox ,  Victor Zyuban ,  Norman J Rohrer

IPC: G11C5/04 ,  H03K19/0175 ,  H03K5/01 ,  H03K5/00

CPC classification number: H03K19/017509 ,  G11C5/147 ,  H02J2001/008 ,  H03K5/01 ,  H03K2005/00013

Abstract: In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node.

公开(公告)号：US20180232034A1

公开(公告)日：2018-08-16

申请号：US15430699

申请日：2017-02-13

Applicant: Apple Inc.

Inventor： Joseph T. DiBene, II ,  Inder M. Sodhi ,  Keith Cox ,  Gerard R. Williams, III

IPC: G06F1/32

Abstract: In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g. with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described.

公开(公告)号：US09811142B2

公开(公告)日：2017-11-07

申请号：US14499807

申请日：2014-09-29

Applicant: Apple Inc.

Inventor： Cyril de la Cropte de Chanterac ,  Manu Gulati ,  Erik P. Machnicki ,  Keith Cox ,  Timothy J. Millet

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/172

Abstract: Embodiments of a method that allow the adjustment of performance settings of a computing system are disclosed. One or more functional units may include multiple monitor circuits, each of which may be configured to monitor a given operational parameter of a corresponding functional unit. Upon detection of an event related to a monitored operational parameter, a monitor circuit may generate an interrupt. In response to the interrupt a processor may adjust one or more performance settings of the computing system.