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公开(公告)号：US10650770B2
公开(公告)日：2020-05-12
申请号：US16243249
申请日：2019-01-09
发明人： Hiroshi Tsuchi
摘要： A differential amplifier circuit includes a differential input stage, a first current mirror, a second current mirror, a first current source circuit, and a second current source circuit. The first current source circuit has a first transistor of a first conductivity type with a control terminal supplied with a first bias voltage, and a second transistor of a second conductivity type with a control terminal supplied with a second bias voltage. An output amplifier circuit includes a third transistor of the first conductivity type and a fourth transistor of the second conductivity type. A control circuit has a fifth transistor of the first conductivity type with a first terminal connected to a connection point between the other end of the second current source circuit and the control terminal of the fourth transistor in the output amplifier circuit, with a second terminal connected to an output node of the second current mirror, and with a control terminal receiving the first bias voltage.
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公开(公告)号：US10600698B2
公开(公告)日：2020-03-24
申请号：US16243173
申请日：2019-01-09
发明人： Hideki Masai
IPC分类号： H01L21/66 , G01R31/28 , G01R31/26 , H01L23/522 , H01L23/525 , H01L23/00
摘要： A semiconductor device includes a signal processing circuit configured to generate an output signal, an output pad, an output line connecting the signal processing circuit to the output pad, the output signal from the signal processing circuit being output from the output pad through the output line, a shorting pad formed in the output line, a switch connected between the shorting pad and the output pad, and configured to connect the signal processing circuit to the output pad when the switch is on, and disconnect the signal processing circuit from the output pad when the switch is off, and a wiring line connecting the shorting pad to the output pad.
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公开(公告)号：US20200081684A1
公开(公告)日：2020-03-12
申请号：US16568889
申请日：2019-09-12
发明人： Hiroji AKAHORI
摘要： A sound source playback unit plays back sound data from a sound source and outputs a playback signal. An amplification unit amplifies the playback signal and outputs the playback signal as an output signal converted to sound in a speaker. A fault detection unit including a first conversion circuit compares the playback signal to a predetermined first threshold, converts a waveform of the playback signal, and outputs the converted waveform as a converted playback signal. A second conversion circuit compares the output signal to a predetermined second threshold, converts a waveform of the output signal, and outputs the converted waveform as a converted output signal. A comparison circuit compares the converted playback signal to the converted output signal, and a determination circuit determines an output of the comparison circuit. Based on the determination, the fault detection unit detects a fault in the amplification unit.
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公开(公告)号：US10580721B2
公开(公告)日：2020-03-03
申请号：US16185169
申请日：2018-11-09
发明人： Akihiko Nomura
IPC分类号： H01L23/48 , H01L21/768 , H01L23/532
摘要： A semiconductor device includes a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; a first conductive layer covering a part of the first main surface; a through electrode connected to the first conductive layer and having a first conductive plated layer and a second conductive plated layer; and a second conductive layer formed on the second main surface. The first conductive plated layer contacts with the semiconductor substrate through a seed layer. The second conductive plated layer is formed on the first conductive plated layer. The second conductive layer is formed of the seed layer, the first conductive plated layer, and the second conductive plated layer. The first conductive plated layer has a first edge surface. The second conductive plated layer has a second edge surface flush with the first edge surface.
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公开(公告)号：US10559521B2
公开(公告)日：2020-02-11
申请号：US16224846
申请日：2018-12-19
发明人： Masamichi Ishihara
IPC分类号： H01L23/48 , H01L23/488 , H01L25/065 , H01L25/04 , H01L23/31 , H01L23/498 , H01L23/00 , H01L29/78
摘要： A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer is formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.
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公开(公告)号：US10559248B2
公开(公告)日：2020-02-11
申请号：US15914118
申请日：2018-03-07
发明人： Hiroshi Tsuchi , Katsunori Ito
IPC分类号： G09G3/36 , G09G3/20 , G09G3/3266 , G09G3/3225 , G09G3/3275
摘要： A display apparatus includes: a display panel; a gate driver that provides, to a plurality of scanning lines, scanning pulse signals for controlling pixel switches to be ON in a selection period corresponding to a pulse width thereof; a data driver that provides gradation voltage signals to a plurality of data lines; and a display controller that provides a modulated clock signal having a frequency that changes at a predetermined rate in one frame period. The gate driver sequentially provides the scanning pulse signals each having a pulse width reflecting to a clock cycle of the modulated clock signal in a predetermined order corresponding to distances from the data driver to the plurality of scanning lines. The data driver provides the gradation voltage signals in the order of providing the scanning pulse signals for every data period corresponding to the clock cycle of the modulated clock signal.
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公开(公告)号：US20200045616A1
公开(公告)日：2020-02-06
申请号：US16516274
申请日：2019-07-19
发明人： Yoshiyuki Tanaka , Naotaka Saito , Eiichi Saito
摘要： The disclosure provides a communication system and a program update method. In a communication system according to the disclosure, when a host device updates a program stored in each of a plurality of communication terminals, first, the host device transmits a distribution preparation completion signal by broadcast. Each of the plurality of communication terminals transmits a start request signal to the host device in response to reception of the distribution preparation completion signal. The host device transmits a permission signal for giving a right for performing a data request to one communication terminal that has transmitted the start request signal earliest. The one communication terminal transmits a data request signal to the host device in response to reception of the permission signal. The host device transmits the update program data by broadcast to the plurality of communication terminals in response to reception of the data request signal.
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公开(公告)号：US20200027523A1
公开(公告)日：2020-01-23
申请号：US16515626
申请日：2019-07-18
发明人： Toshiharu OKADA
IPC分类号： G11C29/00 , G11C29/50 , G11C11/4096
摘要： A testing method for a semiconductor memory includes determining which memory blocks are defective based on the number of defective cells in the block. The method includes determining whether the number of defective blocks exceeds a first threshold value and judging the semiconductor memory to be defective if the number of defective blocks is equal to or greater than the first threshold value. The method also includes comparing the number of defective blocks with a second threshold value equal to or less than the first threshold value and repeating the process of measuring and judging of the memory cells and memory blocks until the number of defective blocks is at least equal to the second threshold value, and then managing access to the defective blocks in a different manner from accesses to other blocks.
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公开(公告)号：US20200026628A1
公开(公告)日：2020-01-23
申请号：US16515741
申请日：2019-07-18
发明人： Toshiharu OKADA
IPC分类号： G06F11/20
摘要： A semiconductor memory device has a memory cell array area including a normal area including memory blocks and a redundant memory area including a redundant block which is a replacement target of a defective block among memory blocks; a storage unit storing address information indicating a position of the defective block in the normal area and address information indicating a position of the redundant block being the replacement target of the defective block, both being in association with each other as a first information; and an output circuit outputting a data row exhibiting a positional relation between the defective block and a memory block other than the defective block in the normal area based on the first information stored in the storage unit in response to the data read signal.
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公开(公告)号：US20190385683A1
公开(公告)日：2019-12-19
申请号：US16434264
申请日：2019-06-07
发明人： Takashi YAMADA
IPC分类号： G11C16/26 , G11C7/10 , G06K19/073
摘要： A semiconductor device has stored therein a plurality of bits of fixed data. The semiconductor device includes a plurality of memory elements that correspond, respectively, to the plurality of bits of the fixed data, and that acquire, store, and output the value of each bit received at an input terminal of each of the memory elements according to a timing signal. An initialization control unit feeds, to the plurality of memory elements, an initialization signal upon receipt of a fixed data setting signal, each of the plurality of memory elements being initialized to a state of storing a corresponding value represented by a bit of the fixed data according to the initialization signal.
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