公开(公告)号：US11907755B2

公开(公告)日：2024-02-20

申请号：US16692760

申请日：2019-11-22

申请人： Rohde & Schwarz GmbH & Co. KG

发明人： Sebastian Roeglinger

IPC分类号： G06F9/48 ,  G06F16/23 ,  G06F9/50 ,  G01R31/317 ,  G05B19/406

CPC分类号： G06F9/4881 ,  G01R31/31718 ,  G01R31/31722 ,  G05B19/406 ,  G06F9/5027 ,  G06F16/2379 ,  G05B2219/33297 ,  G06F2209/503

摘要： A system is provided for distributed execution of a sequence processing chain. The system comprises an interface adapted to set a measurement sequence for a plurality of measurement sites, each comprising a sequence runner. The system further comprises a sequencer repository adapted to be accessed locally from the plurality of measurement sites. Moreover, the system comprises a sequence state manager adapted to receive measurement sequence states from at least one sequence runner and further adapted to distribute the measurement sequence states to other sequence runners via a network. In this context, the measurement sequence states are associated with data and/or results through the sequence processing chain.

公开(公告)号：US11907384B2

公开(公告)日：2024-02-20

申请号：US17337686

申请日：2021-06-03

申请人： Dell Products, L.P.

发明人： Timothy M. Lambert ,  Eugene David Cho

IPC分类号： G06F21/62 ,  G06F11/273 ,  G06F21/70 ,  G06F21/71 ,  G01R31/3185 ,  G01R31/317 ,  G01R31/3183

CPC分类号： G06F21/62 ,  G06F11/273 ,  G06F11/2733 ,  G06F11/2736 ,  G06F21/629 ,  G06F21/70 ,  G06F21/71 ,  G01R31/3183 ,  G01R31/31713 ,  G01R31/31719 ,  G01R31/31727 ,  G01R31/318597 ,  G06F2221/2141

摘要： An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes a first processor configured to execute a custom BMC firmware stack, and a second processor including executable instructions for receiving a request to perform a test on the first processor in which the request is received through a secure communication session established with a remote IHS. The instructions further perform the acts of controlling the first processor to perform the test according to the request, the first processor generating test results associated with the test, and transmitting the test results to the remote IHS through the secure communication session.

公开(公告)号：US20240044978A1

公开(公告)日：2024-02-08

申请号：US18219484

申请日：2023-07-07

申请人： Samsung Electronics Co., Ltd.

发明人： Gunjan Mandal ,  Sunil Rajan ,  Raghavendra Molthati

IPC分类号： G01R31/317 ,  G01R23/20

CPC分类号： G01R31/31727 ,  G01R31/3171 ,  G01R23/20

摘要： Methods and systems for determining and calibrating non-linearity in a phase interpolator. Embodiments determine a first jitter value that causes the bit error rate (BER) of a data sequence to exceed a predefined target BER, when a recovered clock is aligned with the data sequence at a first PI code. The recovered clock is obtained from a data pattern representing the data sequence. Embodiments determine a second jitter value that causes the BER of the data sequence to exceed the predefined target BER at a second PI code. The first PI code may immediately precede or succeed the second PI code. Embodiments determine a Differential Non-Linearity (DNL) corresponding to the second PI code, based on a phase shift introduced to the recovered clock by the second PI code relative to the first PI code, the first jitter value, and the second jitter value. All DNL values corresponding to all PI codes may be determined in a similar manner. An Integral Non-Linearity (INL) may be determined by integrating the DNL corresponding to all PI codes.

公开(公告)号：US20240044976A1

公开(公告)日：2024-02-08

申请号：US17881811

申请日：2022-08-05

申请人： NANYA TECHNOLOGY CORPORATION

发明人： WU-DER YANG

IPC分类号： G01R31/317 ,  H03K17/687

CPC分类号： G01R31/31727 ,  H03K17/6871

摘要： An electronic device including a phase detector is provided. The phase detector includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a first equalizer device. The first transistor has a first input terminal configured to receive a first signal. The second transistor has a second input terminal configured to receive a second signal. The third transistor is electrically connected to the first transistor and has a first output terminal. The fourth transistor is electrically connected to the second transistor and has a second output terminal. The first equalizer device is connected between the first output terminal and the second input terminal.

公开(公告)号：US20240044964A1

公开(公告)日：2024-02-08

申请号：US18491662

申请日：2023-10-20

申请人： FEI Company

发明人： Marcos Hernandez

IPC分类号： G01R31/00 ,  G01R31/28 ,  G01R31/30 ,  G01R31/317

CPC分类号： G01R31/002 ,  G01R31/2884 ,  G01R31/3004 ,  G01R31/31701 ,  H01L2924/00 ,  H01L22/34

摘要： Electrostatic discharge (ESD) test systems include a FET-based pulse generator using pairs of back-to-back FETs coupled to produce an ESD pulse based on discharging a capacitor that is coupled in series with a device under test (DUT). A number of FETs can be selected based on an intended ESD test voltage magnitude.

公开(公告)号：US11893112B2

公开(公告)日：2024-02-06

申请号：US16954507

申请日：2018-11-21

申请人： SECURE-IC SAS

发明人： Sylvain Guilley ,  Adrien Facon ,  Nicolas Bruneau

IPC分类号： G06F21/55 ,  G06N20/00 ,  G06F11/30 ,  G06F21/75 ,  G01R31/317 ,  G06F11/34

CPC分类号： G06F21/554 ,  G01R31/31719 ,  G06F11/3003 ,  G06F11/3058 ,  G06F11/3082 ,  G06F11/3495 ,  G06F21/75 ,  G06N20/00 ,  G06F2221/034

摘要： There is provided a device of protecting an Integrated Circuit from perturbation attacks. The device includes a sensing unit configured to detect a perturbation attack, the sensing unit comprising a set of digital sensors comprising at least two sensors, the sensors being arranged in parallel. Each digital sensor provides a digitized bit output having a binary value, in response to input data, the sensing unit being configured to deliver at least one binary vector comprising a multi-bit value, the multi-bit value comprising at least two bit outputs provided by the set of digital sensors. The sensing device further comprising an analysis unit, the analysis unit being configured to receive at least one binary vector provided by the sensing unit, the analysis unit being configured to detect a perturbation attack from the at least one binary vector.

公开(公告)号：US11892505B1

公开(公告)日：2024-02-06

申请号：US17945576

申请日：2022-09-15

申请人： STMicroelectronics International N.V.

发明人： Avneep Kumar Goyal ,  Anubhav Arora

IPC分类号： G01R31/317 ,  G01R31/3185

CPC分类号： G01R31/31705 ,  G01R31/31726 ,  G01R31/318597

摘要： A processing system includes: main and shadow processing cores configured to operate in lockstep based on a core clock. The main processing core includes a main processing core and a main debug circuit. The shadow processing core includes a shadow functional core and a shadow debug circuit. A redundancy checker circuit is configured to assert an alarm signal when a discrepancy between outputs from the main and shadow functional cores is detected. A debug bus synchronizer circuit is configured to receive input debug data in synchrony with a debug clock, and provide synchronized debug data in synchrony with the core clock to a debug bus based on the input debug data, where the main and shadow debug circuits are configured to receive the synchronized debug data in synchrony with the core clock from the debug bus, and where the debug clock is asynchronous with respect to the core clock.

公开(公告)号：US11892504B1

公开(公告)日：2024-02-06

申请号：US17950983

申请日：2022-09-22

申请人： Cadence Design Systems, Inc.

发明人： Alberto Arias Drake ,  Bijitendra Mittra ,  Keyliane da Silva Fernandes Silvano

IPC分类号： G01R31/00 ,  G01R31/317

CPC分类号： G01R31/31704 ,  G01R31/31727

摘要： Systems and methods of debugging a design under test for metastability issues using formal verification. In one aspect, the method includes determining, by a server, that a functionality of the DUT failed an assertion; generating, by the server, a plurality of first waveforms for a plurality of clock domain crossing (CDC) pairs that are in a cone of influence of the assertion; applying, by the server, a constraint including a condition to the plurality of waveforms; and generating, by the server, one or more second waveforms for a first subset of the plurality of CDC pairs, wherein the first subset of the CDC pairs satisfied the condition.

公开(公告)号：US20240036113A1

公开(公告)日：2024-02-01

申请号：US18268517

申请日：2022-01-06

申请人： SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.

发明人： Mo CHEN ,  Zhijun FAN ,  Jianbo LIU ,  Chao XU

IPC分类号： G01R31/317

CPC分类号： G01R31/31727

摘要： A test circuit (300, 300′, 400, 500, 600, 700, 800), including: a test sequence providing module (301), configured to provide a test sequence (PRBS) to a to-be-tested sequential device (303); a clock driving module (307, 407, 507, 607, 707, 807), configured to provide a clock signal (759) to the to-be-tested sequential device (303), which includes a first clock driving circuit (610, 710), wherein the first clock driving circuit (610, 710) includes: a plurality of first clock paths (421, 423) which respectively provide corresponding clock signals (759); and a logic unit (427, 715) which generates, based on at least part of the clock signals (759) provided by the plurality of first clock paths (421, 423), a first clock signal with an adjusted pulse width, for the to-be-tested sequential device (303); and a verification module (305, 405, 805), configured to verify an output of the to-be-tested sequential device (303).

公开(公告)号：US20240036112A1

公开(公告)日：2024-02-01

申请号：US17876479

申请日：2022-07-28

申请人： AT&T INTELLECTUAL PROPERTY I, L.P.

发明人： Elmer Cruz

IPC分类号： G01R31/317 ,  G01R31/3183

CPC分类号： G01R31/31719 ,  G01R31/318314 ,  G01R31/31713

摘要： Containerized orchestration of secure socket layer virtual private network benchmarking is disclosed. A test portal can accommodate developing test event information (TEI) based on test input information. Test input information can be used to generate event images, e.g., containers, that can be readily scaled, mutated, etc., via a containerization environment instance. One or more event image can be groups into a pod. An event image can be a new container, a previously used container, or a permutation of a container. Event image(s) can be retrieved from external sources, e.g., a library, a commercial vendor of event images, etc. TEI can be based on a pod(s) and communicated to a device-under-test (DUT). DUT performance can be measured, and results can be accessed by an entity, e.g., a test engineer, a results analysis engine, etc. Results can be employed to direct subsequent DUT testing.