Abstract:
Disclosed herein are various embodiments of a graphics accelerator, which may include an integrated circuit. The integrated circuit may include a local memory; a direct memory access (DMA) engine; a processor; and one or more processing pipelines. The local memory stores graphics data that includes a plurality of pixels. The DMA engine transfers the graphics data between the local memory and an external memory. The processor performs at least one operation, in parallel, on components of at least a portion of the pixels. The one or more processing pipelines process the graphics data. The graphics accelerator works on operands and produces outputs for one set of pixels while the DMA engine is bringing in operands for a future set of pixel operations, and transfers data from the external memory to the one or more processing pipelines by directing data to the one or more pipelines.
Abstract:
Circuits, methods, and apparatus that provide highly integrated digital media processors for digital consumer electronics applications. These digital media processors are capable of performing the parallel processing of multiple format audio, video, and graphics signals. In one embodiment, audio and video signals may be received from a variety of input devices or appliances, such as antennas, VCRs, DVDs, and networked devices such as camcorders and modems, while output audio and video signals may be provided to output devices such as televisions, monitors, and networked devices such as printers and networked video recorders. Another embodiment of the present invention interfaces with a variety of devices such as navigation, entertainment, safety, memory, and networking devices. This embodiment can also be configured for use in a digital TV, set-top box, or home server. In this configuration, video and audio streams may be received from a number of cable, satellite, Internet, and consumer devices.
Abstract:
A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.
Abstract:
When an image signal suitable for performing automatic adjustment of an effective image area and a dot clock is not output, the adjustment may be unsuccessfully performed. An effective image area detector detects an effective image area and determines whether an image in the effective image area is a blank image. If a synchronization signal detector determines that there exists a synchronization signal and if the effective image area detector determines that the image is not a blank image, a controller adjusts an area captured as image data by an input signal processor.
Abstract:
A method and a device for displaying an image on an Organic Light Emitting Display where a frame is divided into two groups of subframes are provided for flicker-free and very high level motion rendition. The first group of sub-frames and the at least second group of sub-frames comprise corresponding sub-frames and constitute each a complete image in a video frame and corresponding sub-frames of two groups of sub-frames have similar but not automatically the same duration. The data signal of a cell comprises plural independent elementary data signals wherein each of the elementary data signals is applied to the cell during a sub-frame and the gray scale level displayed by the cell during the respective group of sub-frames depends on the amplitude of the elementary data signals and the duration of the sub-frames.
Abstract:
A system and method force a display device to receive the output produced by a graphics processing unit that is configured as the video graphics array (VGA) boot device for display of critical system screens. A hybrid computer system that includes multiple graphics processors configures a display multiplexor to select image data from one of the multiple graphics processing units for output to the display device. When a critical system event occurs and the graphics processing unit that is selected is not configured as the VGA boot device, system basic input/output system (BIOS) interfaces are used to configure the multiplexor to select the one graphics processing unit that is configured as the VGA boot device to output the critical system screen to the display device.
Abstract:
A display apparatus, a source apparatus, and methods of providing content are provided. The display apparatus includes: a receiver which receives content data; a storage which stores frame size information corresponding to a content type; a detector which detects the content type of the content data; a video processor which forms a content frame having a frame size corresponding to the detected content type by using the frame size information stored in the storage; and a display which displays the content frame formed by the video processor.
Abstract:
In a television, which can be connected to a portable information terminal, it is possible to display video based on the data of a multimedia file stored on a storage medium even in cases where there is no built-in decoder. In cases where a TV itself does not possess a decoder which can decode the data of a multimedia file selected by the user from the multimedia files stored on the USB memory, the CPU of the TV transmits to a smartphone the data of the selected multimedia file and a decoding request command to request that the data be decoded, thus receiving a video signal and/or an audio signal obtained by various types of decoders of the smartphone. Consequently, the CPU of the TV can output video and/or audio to a display unit and a speaker on the basis of the data of the selected multimedia file.
Abstract:
A system and method for synchronizing feeds for multiple digital picture frames. Pictures are received. Each of the pictures is associated with one or more feeds. One or more of a number of digital picture frames are designated to receive each of the one or more feeds. User preferences are received for delivering the one or more feeds. The one or more feeds are communicated to the one or more digital picture frames designated to receive the one or more feeds.
Abstract:
The method for controlling interface according to one embodiment of the present invention comprises the steps of: detecting the state of connection with one or more sink devices and one or more source devices which are connected to input and output ports of a multimedia interface module; identifying one or more operation modes available for the detected connection state; and transmitting device information of the one or more sink devices to the one or more source devices, the device information being selectively edited in accordance with a requested operation mode among the identified operation modes. Therefore, various operation modes such as Through, Convert, Switch, Mix, Distribute, Duplicate and Exchange can be chosen for effective operation, thereby enhancing the convenience of the user and increasing the performance of interface between the sink devices and source devices.