公开(公告)号：US10700146B2

公开(公告)日：2020-06-30

申请号：US15838693

申请日：2017-12-12

Applicant: SAMSUNG DISPLAY CO., LTD. ,  IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)

Inventor： Chong Chul Chai ,  Oh Kyong Kwon ,  Nack Hyeon Keum ,  Kyong Hwan Oh ,  Bo Yong Chung ,  An Su Lee

IPC: G09G3/3233 ,  G09G3/3225 ,  H01L27/32

Abstract: A pixel includes first through fourth transistors and storage capacitor. The first transistor controls an amount of current flowing from a first driving power source to a second driving power source, via an organic light-emitting diode, based on a voltage of a first node. The second transistor is coupled between a first electrode of the first transistor and the first node, and is turned on when a scan signal is supplied to a scan line. The third transistor is coupled between a second electrode of the first transistor and a reference power source, and is turned on when the scan signal is supplied. The fourth transistor is coupled between an anode electrode of the organic light-emitting diode and a data line, and is turned on when the scan signal is supplied. The storage capacitor is coupled between the first node and the anode electrode of the organic light-emitting diode.

公开(公告)号：US10078995B2

公开(公告)日：2018-09-18

申请号：US15084022

申请日：2016-03-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Hee Kim ,  Ji Sun Kim ,  Young Wan Seo ,  Jae Keun Lim ,  Chong Chul Chai

IPC: G09G5/00 ,  H03K17/687 ,  G09G3/3266 ,  G09G3/36

CPC classification number: G09G5/00 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

Abstract: A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.

公开(公告)号：US09870730B2

公开(公告)日：2018-01-16

申请号：US14920596

申请日：2015-10-22

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Hee Kim ,  Ji-Sun Kim ,  Jun Hyun Park ,  Young Wan Seo ,  Jae Keun Lim ,  Chong Chul Chai

IPC: G09G3/36 ,  G09G3/20 ,  H03K19/0175

CPC classification number: G09G3/2092 ,  G09G2310/0286 ,  H03K19/017509

Abstract: A gate circuit according to an exemplary embodiment of the present inventive concept comprises a plurality of stages, each receiving a clock signal and outputting a gate signal and a carry signal. One of the plurality of stages includes a first transistor of which a first terminal and a control terminal are connected to each other and a carry signal of a stage before previous stage is input to the first terminal and the control terminal and a second transistor of which a gate signal of the previous stage is input to a first terminal, a control terminal is connected with a second terminal of the first transistor, and an output terminal is connected to a first node.

公开(公告)号：US09019250B2

公开(公告)日：2015-04-28

申请号：US13718592

申请日：2012-12-18

Applicant: Samsung Display Co., Ltd.

Inventor： Cheol-Gon Lee ,  Joon-Chul Goh ,  Chong Chul Chai

IPC: G09G5/00 ,  G09G3/20 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1333

CPC classification number: G09G3/20 ,  G02F1/133512 ,  G02F1/136209 ,  G02F2001/133388

Abstract: A display panel includes a display area including a plurality of pixels, and a peripheral area defining a non-display area. The display area includes a first light blocking member including a plurality of first openings, and the peripheral area includes a second light blocking member including a plurality of second openings.

Abstract translation: 显示面板包括包括多个像素的显示区域和限定非显示区域的外围区域。 显示区域包括包括多个第一开口的第一遮光构件，并且周边区域包括包括多个第二开口的第二遮光构件。

公开(公告)号：US08896801B2

公开(公告)日：2014-11-25

申请号：US13677187

申请日：2012-11-14

Applicant: Samsung Display Co., Ltd.

Inventor： Jae Keun Lim ,  Joon-Chul Goh ,  Se Hyoung Cho ,  Chong Chul Chai

IPC: G02F1/1339 ,  G02F1/1362 ,  H01L33/00

CPC classification number: G02F1/136286 ,  G02F1/133377 ,  H01L33/005

Abstract: Provided is a liquid crystal display. The liquid crystal display includes: a substrate; a gate line, a common electrode line and a data line formed on the substrate; an insulating layer formed on the gate line, the common electrode line and the data line; a pixel electrode formed on the insulating layer; a microcavity formed on the pixel electrode and including a liquid crystal injection hole; a common electrode formed on the microcavity; a support member formed on the common electrode; and a capping layer formed on the support member and covering the liquid crystal injection hole, in which the common electrode line and the common electrode are connected to each other through a contact hole formed in a passivation layer.

Abstract translation: 提供了一种液晶显示器。 液晶显示器包括：基板; 栅极线，公共电极线和形成在基板上的数据线; 形成在栅极线，公共电极线和数据线上的绝缘层; 形成在所述绝缘层上的像素电极; 形成在像素电极上并包括液晶注入孔的微腔; 形成在微腔上的公共电极; 形成在所述公共电极上的支撑构件; 以及形成在支撑构件上并覆盖液晶注入孔的覆盖层，其中公共电极线和公共电极通过形成在钝化层中的接触孔相互连接。

公开(公告)号：US12008932B2

公开(公告)日：2024-06-11

申请号：US18079107

申请日：2022-12-12

Applicant: Samsung Display Co., LTD.

Inventor： Do Yeong Park ,  Chong Chul Chai

IPC: G09G3/00 ,  G09G3/32 ,  H01L21/66

CPC classification number: G09G3/006 ,  G09G3/32 ,  G09G2330/12 ,  H01L22/32

Abstract: A display device comprises a display area and a first non-display area located on a side of the display area in a first direction, a first bus pattern disposed in the first non-display area, a second bus pattern disposed in the first non-display area and spaced apart from the first bus pattern in a second direction intersecting the first direction, first voltage lines disposed in the display area, extending in the first direction, and electrically connected to the first bus pattern, second voltage lines disposed in the display area, extending in the first direction, and electrically connected to the second bus pattern, and a first test pad disposed in the first non-display area and disposed between the first bus pattern and the second bus pattern.

公开(公告)号：US11893920B2

公开(公告)日：2024-02-06

申请号：US17834480

申请日：2022-06-07

Applicant: Samsung Display Co., LTD.

Inventor： Na Hyeon Cha ,  Sun Kwun Son ,  Dong Hee Shin ,  Chong Chul Chai

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A display device includes a display panel including pixels in a display area, scan lines disposed in the display area and electrically connected to the pixels, a gate driving circuit disposed in the display area and electrically connected to the scan lines, and clock lines disposed in the display area and electrically connected to the gate driving circuit. The gate driving circuit includes stage blocks adjacent to each other and outputting a scan signal in response to a clock signal provided through a corresponding clock line among the clock lines, and a scan signal output from a stage block among the stage blocks is supplied to scan lines of another stage block among the stage blocks.

公开(公告)号：US11877478B2

公开(公告)日：2024-01-16

申请号：US17395004

申请日：2021-08-05

Applicant: Samsung Display Co., LTD.

Inventor： Do Yeong Park ,  Kyung Bae Kim ,  Mee Hye Jung ,  Chong Chul Chai

IPC: H10K59/122 ,  H10K59/35

CPC classification number: H10K59/122 ,  H10K59/353

Abstract: A display device includes subpixels each comprising an emission area, electrodes which are disposed in the emission area, extend in a first direction, and are spaced apart in a second direction intersecting the first direction, a first insulating layer disposed on the electrodes, a first bank, and light emitting elements. The first bank includes a first bank part disposed on the first insulating layer and surrounding the emission area, and a second bank part connected to the first bank part and disposed in the emission area. The light emitting elements are disposed on the electrodes spaced apart in the second direction. A height of the second bank part of the first bank is lower than a height of the first bank part of the first bank.

公开(公告)号：US11514834B2

公开(公告)日：2022-11-29

申请号：US17231492

申请日：2021-04-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Ki Jeong ,  Hyun Joon Kim ,  Kyung Bae Kim ,  Kyung Hoon Chung ,  Chong Chul Chai

IPC: G09G3/20 ,  G02F1/1333 ,  F21V8/00

Abstract: A tiled display device includes an array of a plurality of display panels. Each of the plurality of display panels includes a plurality of pixels constituting a plurality of pixel rows and a plurality of pixel columns, a data distributor disposed between a first pixel of a first pixel row among the plurality of pixel rows and a second pixel of the first pixel row adjacent to the first pixel in a first direction, and a scan driver disposed between the second pixel and a third pixel adjacent to the second pixel in the first direction.

公开(公告)号：US11501715B2

公开(公告)日：2022-11-15

申请号：US16908903

申请日：2020-06-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon Jo ,  Chong Chul Chai ,  Young Wan Seo ,  Cheol-Gon Lee

IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3258

Abstract: A display device includes a substrate that includes a display area for displaying an image and a non-display area surrounding the display area, a plurality of pixels that are disposed in the display area and each include an organic light emitting diode and a pixel circuit portion configured to operate the organic light emitting diode, and a scan driver that is disposed in the non-display area and includes a plurality of stages configured to output scan signals to the plurality of pixels. The plurality of stages may be arranged in n columns, a height of one stage may correspond to a height of n pixels, and n may be an integer of 2 or more.