公开(公告)号：US11031285B2

公开(公告)日：2021-06-08

申请号：US16143850

申请日：2018-09-27

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC: H01L21/768 ,  H01L23/00 ,  H01L21/68 ,  H01L25/065 ,  H01L23/532 ,  H01L25/00

Abstract: Representative implementations of techniques and devices are used to reduce or prevent conductive material diffusion into insulating or dielectric material of bonded substrates. Misaligned conductive structures can come into direct contact with a dielectric portion of the substrates due to overlap, especially while employing direct bonding techniques. A barrier interface that can inhibit the diffusion is disposed generally between the conductive material and the dielectric at the overlap.

公开(公告)号：US10790262B2

公开(公告)日：2020-09-29

申请号：US16363894

申请日：2019-03-25

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Cyprian Emeka Uzoh ,  Jeremy Alfred Theil ,  Liang Wang ,  Rajesh Katkar ,  Guilian Gao ,  Laura Wills Mirkarimi

IPC: H01L21/00 ,  H01L23/00

Abstract: Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

公开(公告)号：US10707087B2

公开(公告)日：2020-07-07

申请号：US15846731

申请日：2017-12-19

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Cyprian Emeka Uzoh ,  Guilian Gao

IPC: H01L21/311 ,  H01L21/683 ,  H01L21/78 ,  H01L21/02

Abstract: Representative implementations provide techniques for processing integrated circuit (IC) dies and related devices, in preparation for stacking and bonding the devices. The disclosed techniques provide removal of processing residue from the device surfaces while protecting the underlying layers. One or more sacrificial layers may be applied to a surface of the device during processing to protect the underlying layers. Processing residue is attached to the sacrificial layers instead of the device, and can be removed with the sacrificial layers.

公开(公告)号：US10672654B2

公开(公告)日：2020-06-02

申请号：US15849325

申请日：2017-12-20

Applicant: Invensas Bonding Technologies, Inc.

Inventor： Cyprian Emeka Uzoh ,  Laura Wills Mirkarimi

IPC: H01L21/768 ,  H01L21/3213 ,  H01L21/306 ,  H01L23/00 ,  H01L21/321 ,  B24B37/04 ,  C23F3/00 ,  H01L21/311 ,  B81B7/00 ,  B81C1/00 ,  C23F1/18 ,  H01L25/065 ,  H01L23/522

Abstract: Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or “dishing” of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

公开(公告)号：US20190189607A1

公开(公告)日：2019-06-20

申请号：US16270466

申请日：2019-02-07

Applicant: INVENSAS BONDING TECHNOLOGIES, INC.

Inventor： Cyprian Emeka Uzoh ,  Arkalgud R. Sitaram ,  Paul Enquist

IPC: H01L25/00 ,  H01L25/065 ,  H01L21/683 ,  H01L21/308 ,  H01L21/56 ,  H01L23/31 ,  H01L21/304 ,  H01L21/306

CPC classification number: H01L25/50 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3081 ,  H01L21/561 ,  H01L21/683 ,  H01L23/3121 ,  H01L23/3135 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/351

Abstract: In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.