Back-contact photovoltaic cells
    52.
    发明申请
    Back-contact photovoltaic cells 审中-公开
    背接触光伏电池

    公开(公告)号:US20060130891A1

    公开(公告)日:2006-06-22

    申请号:US11259979

    申请日:2005-10-27

    Applicant: David Carlson

    Inventor: David Carlson

    Abstract: A photovoltaic cell comprising a wafer comprising a semiconductor material of a first conductivity type, the wafer comprising a first light receiving surface and a second surface opposite the first surface; a first passivation layer positioned over the first surface of the wafer; a first electrical contact positioned over the second surface of the wafer; a second electrical contact positioned over the second surface of the wafer and separated electrically from the first electrical contact; a second passivation layer positioned over the second surface of the wafer in the region on the wafer that is at least between the first electrical contact and the second surface of the wafer; and a layer comprising a semiconductor material of a conductivity opposite the conductivity of the wafer and positioned in the region between the second passivation layer and the first contact.

    Abstract translation: 一种光伏电池,包括包括第一导电类型的半导体材料的晶片,所述晶片包括第一光接收表面和与所述第一表面相对的第二表面; 位于晶片的第一表面上的第一钝化层; 位于所述晶片的所述第二表面上方的第一电接触; 位于所述晶片的所述第二表面上并且与所述第一电触点电隔离的第二电接触; 第二钝化层,其位于所述晶片上的至少位于所述晶片的所述第一电触点和所述第二表面之间的所述晶片的所述第二表面上; 以及包括与晶片的电导率相反的导电性并且位于第二钝化层和第一接触之间的区域中的导电性的半导体材料的层。

    Content search mechanism
    53.
    发明申请
    Content search mechanism 有权
    内容搜索机制

    公开(公告)号:US20060085533A1

    公开(公告)日:2006-04-20

    申请号:US11224728

    申请日:2005-09-12

    CPC classification number: G06F17/30516 G06F9/4498 G06F17/30958 G06F17/30985

    Abstract: An improved content search mechanism uses a graph that includes intelligent nodes avoids the overhead of post processing and improves the overall performance of a content processing application. An intelligent node is similar to a node in a DFA graph but includes a command. The command in the intelligent node allows additional state for the node to be generated and checked. This additional state allows the content search mechanism to traverse the same node with two different interpretations. By generating state for the node, the graph of nodes does not become exponential. It also allows a user function to be called upon reaching a node, which can perform any desired user tasks, including modifying the input data or position.

    Abstract translation: 改进的内容搜索机制使用包括智能节点的图避免了后处理的开销,并提高了内容处理应用的整体性能。 智能节点类似于DFA图中的节点,但包含一个命令。 智能节点中的命令允许生成和检查节点的附加状态。 这种附加状态允许内容搜索机制以两种不同的解释遍历相同的节点。 通过生成节点的状态,节点的图形不会变成指数。 它还允许在到达节点时调用用户功能,节点可以执行任何所需的用户任务,包括修改输入数据或位置。

    Direct access to low-latency memory

    公开(公告)号:US20060059314A1

    公开(公告)日:2006-03-16

    申请号:US11024002

    申请日:2004-12-28

    CPC classification number: G06F9/3824 G06F9/3885 G06F12/0888

    Abstract: A content aware application processing system is provided for allowing directed access to data stored in a non-cache memory thereby bypassing cache coherent memory. The processor includes a system interface to cache coherent memory and a low latency memory interface to a non-cache coherent memory. The system interface directs memory access for ordinary load/store instructions executed by the processor to the cache coherent memory. The low latency memory interface directs memory access for non-ordinary load/store instructions executed by the processor to the non-cache memory, thereby bypassing the cache coherent memory. The non-ordinary load/store instruction can be a coprocessor instruction. The memory can be a low-latency type memory. The processor can include a plurality of processor cores.

    Multiply instructions for modular exponentiation
    55.
    发明申请
    Multiply instructions for modular exponentiation 审中-公开
    乘以模幂运算的指令

    公开(公告)号:US20060059221A1

    公开(公告)日:2006-03-16

    申请号:US11044648

    申请日:2005-01-27

    Applicant: David Carlson

    Inventor: David Carlson

    Abstract: A method and apparatus for increasing performance of a multiplication operation in a processor. The processor's instruction set includes multiply instructions that can be used to accelerate modular exponentiation. Prior to issuing a sequence of multiply instructions for the multiplication operation, a multiplier register in a multiply unit in the processor is loaded with the value of the multiplier. The multiply unit stores intermediate results of the multiplication operation in redundant format. The intermediate results are shifted and stored in the product register in the multiply unit so that carries between intermediate results are handled within the multiply unit.

    Abstract translation: 一种用于增加处理器中乘法运算性能的方法和装置。 处理器的指令集包括可用于加速模幂运算的乘法指令。 在发布用于乘法运算的乘法指令序列之前,处理器中的乘法单元中的乘法器寄存器加载乘法器的值。 乘法单元以冗余格式存储乘法运算的中间结果。 中间结果被转移并存储在乘法单元中的乘积寄存器中,从而在乘法单元内处理中间结果之间的传送。

    MICROCODE AUTHENTICATION
    59.
    发明申请
    MICROCODE AUTHENTICATION 审中-公开
    MICROCODE认证

    公开(公告)号:US20120216050A1

    公开(公告)日:2012-08-23

    申请号:US13403360

    申请日:2012-02-23

    CPC classification number: H04L9/3236 G06F21/30 H04L2209/127

    Abstract: A microcode authentication unit provides access to a secure hardware unit. A microcode segment is provided to the microcode authentication unit, which generates a signature corresponding to the segment and compares the size and signature of the segment against stored values. If a match is determined, the unit enables access to the secure hardware unit.

    Abstract translation: 微代码认证单元提供对安全硬件单元的访问。 微代码段被提供给微代码认证单元,其产生对应于段的签名并将段的大小和签名与存储的值进行比较。 如果确定匹配,则本机可以访问安全硬件单元。

Patent Agency Ranking