Wireless Receiver
    51.
    发明申请
    Wireless Receiver 有权
    无线接收器

    公开(公告)号:US20160294422A1

    公开(公告)日:2016-10-06

    申请号:US14687653

    申请日:2015-04-15

    CPC classification number: H04B1/16

    Abstract: A system includes a first filter circuitry and one or more second filter circuitry. The first filter circuitry can operate at a frequency of a wireless signal to filter the wireless signal to attenuate undesired feedthrough components and pass through a desired component. The system can also include a multi-phase mixer to convert the frequency of the wireless signal to a lower frequency and divide the wireless signal into at least four phase shifted baseband signal components. The second filter circuitry can operate at the lower frequency to filter the phase shifted baseband signal components to attenuate undesired feedthrough components and pass through a desired component. The system can also include a matrix to combine the baseband signal components to form an output signal.

    Abstract translation: 系统包括第一滤波器电路和一个或多个第二滤波器电路。 第一滤波器电路可以以无线信号的频率工作,以对无线信号进行滤波,以衰减不需要的馈通分量并通过所需的分量。 该系统还可以包括多相混频器,以将无线信号的频率转换为较低的频率,并将无线信号分成至少四个相移的基带信号分量。 第二滤波器电路可以在较低频率下操作以对相移的基带信号分量进行滤波,以衰减不期望的馈通分量并通过所需的分量。 该系统还可以包括用于组合基带信号分量以形成输出信号的矩阵。

    Portable computing device with wireless power distribution
    53.
    发明授权
    Portable computing device with wireless power distribution 有权
    带无线功率分配的便携式计算设备

    公开(公告)号:US09270139B2

    公开(公告)日:2016-02-23

    申请号:US14808673

    申请日:2015-07-24

    Abstract: A core module for a portable computing device includes wireless power receiver circuitry, battery power circuitry, power supply circuitry, a processor, and an RF link interface. The wireless power receiver module, when operable, receives a wireless power transmit signal and converts it into a supply voltage. The battery power circuitry, when operable, outputs a battery voltage. The power supply circuitry, when operable, converts the supply voltage or the battery voltage into one or more power supply voltages. The processor is operable to select one of the battery voltage, the supply voltage, and one of the one or more power supply voltages to produce a selected voltage. The RF link interface outputs the selected voltage on to an RF link of the portable computing device for providing power to one or more multi mode RF units within the portable computing device.

    Abstract translation: 用于便携式计算设备的核心模块包括无线电力接收器电路,电池电源电路,电源电路,处理器和RF链路接口。 无线电力接收器模块在可操作时接收无线功率发射信号并将其转换成电源电压。 电池电源电路在可操作时输出电池电压。 电源电路在可操作时将电源电压或电池电压转换成一个或多个电源电压。 处理器可操作以选择电池电压,电源电压和一个或多个电源电压中的一个以产生所选择的电压。 RF链路接口将所选择的电压输出到便携式计算设备的RF链路,以向便携式计算设备内的一个或多个多模式RF单元提供电力。

    Method and system for low-noise, highly-linear receiver front-end
    54.
    发明授权
    Method and system for low-noise, highly-linear receiver front-end 有权
    低噪声,高线性接收机前端的方法和系统

    公开(公告)号:US09031529B2

    公开(公告)日:2015-05-12

    申请号:US13863057

    申请日:2013-04-15

    CPC classification number: H04B1/16 H04B1/30

    Abstract: Aspects of a method and system for a low-noise, highly-linear receiver front-end are provided. In this regard, a received signal may be processed via one or more transconductances, one or more transimpedance amplifiers (TIAs), and one or more mixers to generate a first baseband signal corresponding to a voltage at a node of the receiver, and a second baseband signal corresponding to a current at the node of the receiver. The first signal and the second signal may be processed to recover information from the received signal. The first signal may be generated via a first one or more signal paths of the receiver and the second signal may be generated via a second one or more signal paths of the receiver.

    Abstract translation: 提供了一种用于低噪声,高线性接收机前端的方法和系统。 在这方面,可以经由一个或多个跨导,一个或多个跨阻抗放大器(TIAs)和一个或多个混频器来处理接收的信号,以产生对应于接收机的节点处的电压的第一基带信号,以及第二 对应于接收机节点处的电流的基带信号。 可以处理第一信号和第二信号以从接收的信号中恢复信息。 可以经由接收机的第一个或多个信号路径生成第一信号,并且可以经由接收机的第二个一个或多个信号路径来生成第二信号。

    Integrated circuit with calibrated pulling effect correction
    55.
    发明授权
    Integrated circuit with calibrated pulling effect correction 有权
    具有校准拉动效果校正的集成电路

    公开(公告)号:US09007131B2

    公开(公告)日:2015-04-14

    申请号:US13802408

    申请日:2013-03-13

    Abstract: A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal. The frequency-control circuit also includes a frequency divider that is configured to apply a correction voltage to a feedback of the output frequency signal, the correction voltage being a function of a pulling signal having one or more unwanted frequency components. The frequency-control circuit also includes a loop filter configured to filter the output detection signal including the correction voltage and generate a control voltage signal. The frequency-control circuit also includes a voltage-controlled oscillator configured to receive the control voltage signal and generate an output frequency signal.

    Abstract translation: 频率控制电路包括被配置为接收参考频率信号并产生输出检测信号的相位频率检测器。 相位频率检测器可以被配置为检测参考频率信号和输出频率信号的反馈之间的相位和频率的差异。 频率控制电路还包括分频器,其被配置为将校正电压施加到输出频率信号的反馈,校正电压是具有一个或多个不需要的频率分量的拉动信号的函数。 频率控制电路还包括环路滤波器,其被配置为对包括校正电压的输出检测信号进行滤波并产生控制电压信号。 频率控制电路还包括被配置为接收控制电压信号并产生输出频率信号的压控振荡器。

    Low-loss TX-to-RX isolation using electrical balance duplexer with noise cancellation
    56.
    发明授权
    Low-loss TX-to-RX isolation using electrical balance duplexer with noise cancellation 有权
    使用具有噪声消除功能的电气平衡双工器进行低损耗TX-to-RX隔离

    公开(公告)号:US09000860B2

    公开(公告)日:2015-04-07

    申请号:US13719055

    申请日:2012-12-18

    CPC classification number: H04B15/00 H04B1/123 H04B1/48 H04B1/525 H04L5/14

    Abstract: A circuit for a low-loss electrical balance duplexer (EBD) with noise cancellation may include an EBD circuit. The EBD circuit may be coupled to one or more output nodes of a transmit (TX) path, an antenna, and a one or more input nodes of a receive (RX) path. The EBD circuit may be configured to isolate the TX path from the RX path, and to provide low-loss signal paths between the one or more output nodes of the TX path and the antenna. A balancing network may be coupled to the EBD circuit and configured to provide an impedance that matches an impedance associated with the antenna. A noise cancellation circuit may be configured to sense a noise signal generated by the balancing network, and to use the sensed noise signal to improve a signal-to-noise ratio (SNR) of the RX path.

    Abstract translation: 用于具有噪声消除的低损耗电气平衡双工器(EBD)的电路可以包括EBD电路。 EBD电路可以耦合到发射(TX)路径,天线和接收(RX)路径的一个或多个输入节点的一个或多个输出节点。 EBD电路可以被配置为将TX路径与RX路径隔离,并且在TX路径的一个或多个输出节点和天线之间提供低损耗信号路径。 平衡网络可以耦合到EBD电路并且被配置为提供匹配与天线相关联的阻抗的阻抗。 噪声消除电路可以被配置为感测由平衡网络产生的噪声信号,并且使用所感测的噪声信号来提高RX路径的信噪比(SNR)。

    WIDE BAND ELECTRICAL BALANCE DUPLEXER WITH BALANCED BRIDGE CIRCUIT
    58.
    发明申请
    WIDE BAND ELECTRICAL BALANCE DUPLEXER WITH BALANCED BRIDGE CIRCUIT 有权
    宽带电平衡双平衡器与平衡桥电路

    公开(公告)号:US20140169235A1

    公开(公告)日:2014-06-19

    申请号:US13715893

    申请日:2012-12-14

    CPC classification number: H01Q1/50 H03H7/38 H03H7/463 H04B1/44 H04B1/525 H04L5/14

    Abstract: A circuit for a wideband electrical balance duplexer (EBD) may include a first impedance element and a second impedance coupled between a first and a second node and a second and a third node of the bridge circuit, respectively. An antenna may be coupled between the first and a fourth node of the bridge circuit to receive and transmit RF signals. A balancing network may provide an impedance substantially matching an impedance of the antenna. The balancing network may be coupled between the third and the fourth node of the bridge circuit. The first or the second impedance elements may facilitate balancing the bridge circuit. One or more output nodes of a transmit path may be coupled to an input node of the bridge circuit. One or more input nodes of a receive path may be coupled between the second and the fourth node of the bridge circuit.

    Abstract translation: 用于宽带电平衡双工器(EBD)的电路可以分别包括耦合在第一和第二节点与桥接电路的第二和第三节点之间的第一阻抗元件和第二阻抗。 天线可以耦合在桥接电路的第一和第四节点之间以接收和发射RF信号。 平衡网络可以提供基本上匹配天线的阻抗的阻抗。 平衡网络可以耦合在桥接电路的第三和第四节点之间。 第一或第二阻抗元件可以有助于桥接电路的平衡。 发射路径的一个或多个输出节点可以耦合到桥接电路的输入节点。 接收路径的一个或多个输入节点可以耦合在桥接电路的第二和第四节点之间。

    FRONT-END MODULE NETWORK FOR FEMTOCELL APPLICATIONS
    59.
    发明申请
    FRONT-END MODULE NETWORK FOR FEMTOCELL APPLICATIONS 有权
    用于FEMTOCELL应用的前端模块网络

    公开(公告)号:US20130316760A1

    公开(公告)日:2013-11-28

    申请号:US13956329

    申请日:2013-07-31

    CPC classification number: H04W88/06 H04B1/406

    Abstract: A wireless communication device includes a front-end module (FEM) network, an RF connection, and a system on a chip (SOC). A first set of FEMs is operable to output, via an antenna, a first outbound RF signal to a first wireless communication device and receive a first inbound RF signal via an antenna. A second set of FEMs is operable to output, via an antenna, a second outbound RF signal to a second wireless communication device, wherein the second outbound RF signal is representative of the first inbound RF signal, and receive a second inbound RF signal via an antenna, wherein the first outbound RF signal is representative of the second inbound RF signal. The SOC is operable to activate the first and second sets of FEMs, facilitate the first outbound RF signal representing the second inbound RF signal, and facilitate the second outbound RF signal representing the first inbound RF signal.

    Abstract translation: 无线通信设备包括前端模块(FEM)网络,RF连接和芯片上的系统(SOC)。 第一组FEM可操作以经由天线经由天线将第一出站RF信号输出到第一无线通信设备,并且经由天线接收第一入站RF信号。 第二组FEM可操作以经由天线将第二出站RF信号输出到第二无线通信设备,其中第二出站RF信号表示第一入站RF信号,并经由第一入站RF信号接收第二入站RF信号 天线,其中第一出站RF信号表示第二入站RF信号。 SOC可操作以激活第一和第二组FEM,便于表示第二入站RF信号的第一出站RF信号,并且便于表示第一入站RF信号的第二出站RF信号。

    Low Power Receiver
    60.
    发明申请
    Low Power Receiver 有权
    低功率接收机

    公开(公告)号:US20130259163A1

    公开(公告)日:2013-10-03

    申请号:US13901500

    申请日:2013-05-23

    Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an s output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TTA) implemented using a current mode to buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

    Abstract translation: 根据一个实施例,紧凑型低功率接收机包括由数字控制接口电路连接的第一和第二模拟电路。 第一模拟电路在s输出具有第一直流(DC)偏移和第一共模电压,并且第二模拟电路在输入端具有第二DC偏移和第二共模电压。 数字控制接口电路将输出连接到输入,并且被配置为匹配第一和第二DC偏移并且匹配第一和第二共模电压。 在一个实施例中,第一模拟电路是使用电流模式进行缓冲实现的可变增益控制跨阻抗放大器(TTA),第二模拟电路是二阶可调低通滤波器,由此三极可调低通滤波器 滤波器在紧凑型低功率接收机中得到有效的生产。

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