公开(公告)号：US6069371A

公开(公告)日：2000-05-30

申请号：US39383

申请日：1998-03-16

申请人： Ichiro Omura ,  Tomoki Inoue

发明人： Ichiro Omura ,  Tomoki Inoue

IPC分类号： H01L29/78 ,  H01L27/08 ,  H01L29/739 ,  H01L29/861 ,  H01L29/87

CPC分类号： H01L27/0817 ,  H01L27/0814 ,  H01L29/7395 ,  H01L29/861

摘要： A semiconductor rectifier in which the sum of loss during reverse recovery and loss in a conducting state can be suppressed even if the ratio between the periods of the conducting and blocking states varies and a method of driving the same are disclosed. A voltage is applied to a gate electrode formed in a face-to-face relationship with a base layer of a first conductivity type and an emitter layer of a second conductivity type with a gate insulation film interposed therebetween to form an inversion layer on the surface of the base layer of the first conductivity type. As a result, the base layer of the first conductivity type and the short layer of the first conductivity type are short-circuited to decrease the density of carriers in the base layer of the first conductivity type, loss during a reverse recovery operation can be suppressed.

摘要翻译： 即使在导通和阻塞状态的周期之间的比率发生变化的情况下也能够抑制反向恢复中的损耗和导通状态的损耗之和的半导体整流器及其驱动方法。 将电压施加到与第一导电类型的基极层和第二导电类型的发射极层的面对面关系形成的栅电极，其间插入栅极绝缘膜，以在表面上形成反型层 的第一导电类型的基层。 结果，第一导电类型的基层和第一导电类型的短层被短路以降低第一导电类型的基极层中的载流子的密度，可以抑制反向恢复操作期间的损耗 。

公开(公告)号：US5986289A

公开(公告)日：1999-11-16

申请号：US936590

申请日：1997-09-24

申请人： Jean-Michel Simmonet

发明人： Jean-Michel Simmonet

IPC分类号： H01L29/861 ,  H01L29/74 ,  H01L29/747 ,  H01L29/87

CPC分类号： H01L29/87

摘要： The present invention relates to a bidirectional breakover component including a lightly-doped N-type substrate, an upper P-type region extending over practically the entire upper surface of the component except its circumference, a lower P-type uniform layer on the lower surface side of the component, substantially complementary N-type regions respectively formed in the upper region and in the lower layer, a peripheral P-type well, an overdoped P-type region at the upper surface of the well, and lightly-doped N-type regions between the circumference of the upper region and the well.

摘要翻译： 本发明涉及一种双向断开部件，其包括轻掺杂N型基板，上部P型区域在除了圆周外的部件的整个上表面的几乎整个上延伸，下表面上的下P型均匀层 分别形成在上部区域和下部层中的基本上互补的N型区域，周边P型阱，在阱的上表面处的过掺杂的P型区域，以及轻掺杂的N型区域， 在上部区域的圆周和井之间的类型区域。

公开(公告)号：US5962878A

公开(公告)日：1999-10-05

申请号：US154169

申请日：1998-09-16

申请人： Toru Takizawa

发明人： Toru Takizawa

IPC分类号： H01L21/329 ,  H01L29/86 ,  H01L29/87 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/6609 ,  H01L29/86 ,  H01L29/87

摘要： In a bidirectional surge protection device formed on a semiconductor substrate, buried layers, which have the same conduction type as and are higher in impurity concentration than the semiconductor substrate, are formed on the entire surfaces of the device regions provided on both surfaces of the semiconductor substrate or formed under emitter-push restraining layers alone, wherein injection of minority carriers from a surface opposite to the surface on which the device operates is restrained to lower a holding current. As a result, the bidirectional surge protection device easily becomes OFF once it becomes ON.

摘要翻译： 在形成在半导体衬底上的双向电涌保护器件中，在半导体衬底的两个表面上设置的器件区域的整个表面上形成了具有与半导体衬底相同的导电类型和高于杂质浓度的掩埋层 衬底或仅在发射极 - 推动抑制层下形成，其中抑制了从与器件工作的表面相对的表面的少数载流子的注入以降低保持电流。 结果，双向浪涌保护装置一旦接通就容易变为OFF。

公开(公告)号：US5923066A

公开(公告)日：1999-07-13

申请号：US940473

申请日：1997-09-30

申请人： Jenoe Tihanyi

发明人： Jenoe Tihanyi

IPC分类号： H01L29/10 ,  H01L29/739 ,  H01L29/78 ,  H01L29/87

CPC分类号： H01L29/1095 ,  H01L29/7391 ,  H01L29/7397

摘要： A field-effect-controllable semiconductor component includes a semiconductor body with first and second surfaces. An inner zone of a first conduction type adjoins the first surface. An anode zone of the opposite, second conduction type adjoins the inner zone in the direction of the first surface and adjoins the second surface in the opposite direction. At least one first base zone of the second conduction type is embedded in the first surface. At least one source zone of the first conduction type is embedded in the first surface. At least one source electrode makes contact with the base zones and the source zones. At least one gate electrode is insulated from the semiconductor body and the source electrode by a gate oxide and at least partly covers parts of the first base zones appearing at the first surface. Intermediate cell zones contain the source zones. Trenches enclose the intermediate cell zones and are insulated from the intermediate cell zones by a gate oxide. Gate electrode pins in the trenches are connected to the gate electrode running on the first surface.

摘要翻译： 场效应可控半导体部件包括具有第一和第二表面的半导体本体。 第一导电类型的内部区域与第一表面相邻。 相对的第二导电类型的阳极区域在第一表面的方向上与内部区域相邻，并且在相反方向上与第二表面相邻。 第二导电类型的至少一个第一基区被嵌入在第一表面中。 第一导电类型的至少一个源极区被嵌入在第一表面中。 至少一个源极与基极区和源极区接触。 至少一个栅电极通过栅极氧化物与半导体本体和源电极绝缘，并且至少部分地覆盖出现在第一表面处的第一基区的部分。 中间单元区域包含源区域。 沟槽包围中间细胞区域，并通过栅极氧化物与中间细胞区域绝缘。 沟槽中的栅电极引脚连接到在第一表面上运行的栅电极。

公开(公告)号：US5900651A

公开(公告)日：1999-05-04

申请号：US564333

申请日：1995-12-01

申请人： Satoshi Kitagawa ,  Toshihiro Tabuchi ,  Toshiyuki Kamei ,  Tatsuya Kamimura

发明人： Satoshi Kitagawa ,  Toshihiro Tabuchi ,  Toshiyuki Kamei ,  Tatsuya Kamimura

IPC分类号： H01L29/41 ,  H01L29/06 ,  H01L29/10 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861 ,  H01L29/87

CPC分类号： H01L29/0661 ,  H01L29/0611 ,  H01L29/102 ,  H01L29/747 ,  H01L29/87 ,  H01L29/0692

摘要： A distance from the bottom of a mesa groove to an underlying pn junction exceeds the elongation of a depletion layer from the underlying pn junction that occurs when a voltage nearly equal to a target withstand voltage is applied, and a groove width of a section other than a corner of the mesa groove, that is, the groove width of a straight section, is nearly equal to the distance from the bottom of the mesa groove to the underlying pn junction.

摘要翻译： PCT No.PCT / JP94 / 00884 Sec。 371 1995年12月1日第 102（e）1995年12月1日日期PCT PCT 1994年6月1日PCT公布。 公开号WO94 / 28586 日期1994年12月8日从台面凹槽的底部到下面的pn结的距离超过当施加几乎等于目标耐受电压的电压时发生的下面的pn结的耗尽层的延伸，并且槽宽度 除了台面槽的角部以外的部分，即直线部分的槽宽度几乎等于从台面凹槽的底部到下面的pn结的距离。

公开(公告)号：US5874751A

公开(公告)日：1999-02-23

申请号：US626335

申请日：1996-04-02

申请人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

发明人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

IPC分类号： H01L29/744 ,  H01L29/06 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/87

CPC分类号： H01L29/749 ,  H01L29/0692 ,  H01L29/7455

摘要： An insulated gate thyristor is provided which includes a first-conductivity-type base layer of high resistivity, first and second second-conductivity-type base regions formed in a surface layer of a first major surface of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region, a gate electrode formed on surfaces of the first second-conductivity-type base region, the first-conductivity-type base layer, and the second second-conductivity-type base region, which surfaces are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region, an insulating film interposed between the gate electrode and these surface of the base regions and layer, a first main electrode in contact with both the first second-conductivity-type base region and the first-conductivity-type source region, a second-conductivity-type emitter layer formed on a second major surface of the first-conductivity-type base layer, and a second main electrode in contact with the second-conductivity-type emitter layer. The entire surface areas of the second second-conductivity-type base region and the first-conductivity-type emitter region are covered with the insulating film.

摘要翻译： 提供一种绝缘栅极晶闸管，其包括形成在第一导电型基极层的第一主表面的表面层中的高电阻率第一和第二第二导电型基极的第一导电型基极层， 形成在第一第二导电型基极区域的表面层中的第一导电型源极区域，形成在第二第二导电型基极区域的表面层中的第一导电型发射极区域，栅极 形成在第一导电型基极区域，第一导电型基极层和第二第二导电型基极区域的表面上的电极，其表面插入在第一导电型源极区域和第二导电型基极区域之间， 第一导电型发射极区域，介于栅电极与基极区域和层的这些表面之间的绝缘膜，与第一第二导电型基极区相接触的第一主电极 所述第一导电型源极区和所述第一导电型源区，形成在所述第一导电型基极层的第二主表面上的第二导电型发射极层和与所述第二导电型发射极接触的第二主电极 层。 第二第二导电型基极区域和第一导电型发射极区域的整个表面积被绝缘膜覆盖。

公开(公告)号：US5793063A

公开(公告)日：1998-08-11

申请号：US625638

申请日：1996-03-29

申请人： David Whitney

发明人： David Whitney

IPC分类号： H01L29/74 ,  H01L29/739 ,  H01L29/78 ,  H01L29/86 ,  H01L29/87 ,  H01L31/111 ,  H01L21/22

CPC分类号： H01L29/87 ,  H01L24/32 ,  H01L29/86 ,  H01L31/1113 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2924/10155 ,  H01L2924/10158 ,  H01L2924/13034 ,  H01L2924/1306 ,  H01L2924/14

摘要： An optically-triggered silicon controlled rectifier (SCR) (21) having a number of semiconductor layers (23, 24, 31) diffused into an N type substrate (22). Specifically, the SCR is formed by diffusing a first P+ layer (23) into an upper surface of the substrate. Then, an N+ layer (24) is diffused into a portion of an upper surface of the first P+ layer. An oxide layer (25) which is permeable to optical radiation is formed on the first P+ layer. A conductive cathode terminal (26) is then deposited on the N+ layer. Therefore, a trench (30) is etched in the lower surface of the substrate. The trench is defined by a depth and a surface. A second P+ layer (31) is diffused into the surface of the trench. The depth of the trench substantially defines a spacing between the first and second P+ layers. The chip is soldered onto a pedestal (33) formed on a lead frame (34). The solder is deposited in the trench and contacts the second P+ layer to form an anode terminal (36). The pedestal may be formed by either etching or stamping a depression (35) in the lead frame.

摘要翻译： 具有漫射到N型衬底（22）中的多个半导体层（23,24,31）的光触发可控硅整流器（SCR）（21）。 具体地说，通过将第一P +层（23）扩散到衬底的上表面中形成SCR。 然后，N +层（24）扩散到第一P +层的上表面的一部分。 在第一P +层上形成可透光的氧化物层（25）。 然后将导电阴极端子（26）沉积在N +层上。 因此，在衬底的下表面中蚀刻沟槽（30）。 沟槽由深度和表面限定。 第二P +层（31）扩散到沟槽的表面。 沟槽的深度基本上限定了第一和第二P +层之间的间隔。 芯片被焊接到形成在引线框架（34）上的基座（33）上。 焊料沉积在沟槽中并与第二P +层接触以形成阳极端子（36）。 基座可以通过蚀刻或冲压引线框架中的凹陷（35）来形成。

公开(公告)号：US5719413A

公开(公告)日：1998-02-17

申请号：US475562

申请日：1995-06-07

申请人： Eric Bernier

发明人： Eric Bernier

IPC分类号： H01L29/74 ,  H01L29/747 ,  H01L29/861 ,  H01L29/87 ,  H01L31/111

CPC分类号： H01L29/87

摘要： A gateless thyristor or a gateless triac with shorting holes having a sharp switching threshold and a high current value I.sub.H includes, a first area having a first density of shorting holes and a second area having a second density of shorting holes lower than the first density.

摘要翻译： 具有具有尖锐切换阈值和高电流值IH的具有短路孔的无盖可控硅或无盖三端双向可控硅开关元件包括：具有第一密度的短路孔的第一区域和具有低于第一密度的第二密度的短路孔的第二区域。

公开(公告)号：US5483086A

公开(公告)日：1996-01-09

申请号：US469423

申请日：1995-06-06

申请人： Koichi Ohta

发明人： Koichi Ohta

IPC分类号： H01L27/02 ,  H01L29/87 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/87 ,  H01L27/0248

摘要： A thyristor type surge protector having a breakdown voltage V.sub.BO approximately equal to a surge clamping voltage V.sub.CL includes a P-type first semiconductor layer, an N-type second semiconductor layer provided in one surface of the first semiconductor layer, a P-type third semiconductor layer provided in the second semiconductor layer so as to provide at least one first exposed region of the second semiconductor layer, and an N-type fourth semiconductor layer formed in the other surface of the first semiconductor layer so as to provide at least one exposed region of said first semiconductor layer, a first electrode provided over the third semiconductor layer and of the first exposed region, and a second electrode provided over the fourth semiconductor layer and second exposed region.

摘要翻译： 具有大致等于浪涌钳位电压VCL的击穿电压VBO的晶闸管型浪涌保护器包括P型第一半导体层，设置在第一半导体层的一个表面中的N型第二半导体层，P型第三半导体 设置在所述第二半导体层中以提供所述第二半导体层的至少一个第一曝光区域和形成在所述第一半导体层的另一个表面中的N型第四半导体层，以便提供至少一个曝光区域 所述第一半导体层，设置在所述第三半导体层和所述第一暴露区域上的第一电极，以及设置在所述第四半导体层和所述第二暴露区域上的第二电极。

公开(公告)号：US5343065A

公开(公告)日：1994-08-30

申请号：US961360

申请日：1992-10-15

申请人： Takashi Saitou

发明人： Takashi Saitou

IPC分类号： H01L29/74 ,  H01L27/02 ,  H01L29/861 ,  H01L29/866 ,  H01L29/87 ,  H01L29/92

CPC分类号： H01L29/866 ,  H01L27/0248 ,  H01L29/87

摘要： The hold current of a breakover type surge protection device is increased by irradiating the device with .gamma. or x rays so as to form crystal lattice defects in the semiconductor regions thereof.

摘要翻译： 通过用γ或X射线照射器件来增加突发型浪涌保护器件的保持电流，从而在其半导体区域中形成晶格缺陷。