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70 条记录 (耗时 0.024 秒)

    Drain Switched Split Amplifier with Capacitor Switching for Noise Figure and Isolation Improvement in Split Mode
    41.
    发明申请
    Drain Switched Split Amplifier with Capacitor Switching for Noise Figure and Isolation Improvement in Split Mode 有权

    公开(公告)号：US20220209719A1

    公开(公告)日：2022-06-30

    申请号：US17573375

    申请日：2022-01-11

    申请人： pSemi Corporation

    发明人： Kashish Pal ,  Emre Ayranci ,  Miles Sanner

    IPC分类号： H03F1/22 ,  H03F3/193 ,  H03F1/26 ,  H04L27/26 ,  H03F3/68

    摘要： An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

    Drain Switched Split Amplifier with Capacitor Switching for Noise Figure and Isolation Improvement in Split Mode
    45.
    发明申请
    Drain Switched Split Amplifier with Capacitor Switching for Noise Figure and Isolation Improvement in Split Mode 审中-公开

    公开(公告)号：US20190372528A1

    公开(公告)日：2019-12-05

    申请号：US15991980

    申请日：2018-05-29

    申请人： pSemi Corporation

    发明人： Kashish Pal ,  Emre Ayranci ,  Miles Sanner

    IPC分类号： H03F1/22 ,  H03F3/193 ,  H03F1/26 ,  H03F3/68 ,  H04L27/26

    摘要： An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

    Front end module with input match configurability
    48.
    发明授权
    Front end module with input match configurability 有权

    公开(公告)号：US10177715B1

    公开(公告)日：2019-01-08

    申请号：US15728314

    申请日：2017-10-09

    申请人： pSemi Corporation

    发明人： Emre Ayranci ,  Miles Sanner

    IPC分类号： H03F1/07 ,  H03F1/26 ,  H03F3/19 ,  H03F1/56 ,  H04B1/16 ,  H04B1/40

    摘要： A front end module (FEM) and associated method for receiving signals in a front end module are disclosed. Some embodiments of the FEM have three inputs. The FEM can process the input signals in one of three bypass modes. In bypass modes, switchable tank circuits provide a high impedance to isolate active components from the bypass path. This improves the input return loss in the passive bypass mode and thus improves the performance of the passive bypass mode by allowing the use of LNAs without an input switch. In the active gain mode, one of a plurality of signals are amplified by one of an equal number of amplifiers coupled to the FEM output. Accordingly, the FEM can output signals applied to any one of the FEM inputs in bypass mode, or an amplified version of one of the input signals. In some embodiments, the FEM has only one input and one LNA. In such embodiments, an output selector switch selects between a bypass path and a gain path.