Abstract:
A thin film transistor includes a substrate, a gate electrode, a buffer layer, a gate insulating layer, an active layer, an etching stop layer, a source electrode and a drain electrode. The gate electrode is formed on the substrate. The buffer layer partially covers both side portions of the gate electrode. The gate insulating layer covers the gate electrode and the buffer layer. The active layer is formed on the gate insulating layer. The etching stop layer is formed on the active layer, and has a first opening and a second opening on the active layer. The source electrode is formed on the etching stop layer, and contacts with the active layer through the first opening. The drain electrode is formed on the etching stop layer, and is contacted with the active layer through the second opening.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the dock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage,
Abstract:
A scan driver includes a plurality of stages arranged sequentially and configured to respectively output a scan signal; and a switching unit configured to receive a plurality of clock signals, to select clock signals of the plurality of clock signals according to a selection control signal, and to input the selected clock signals to the plurality of stages.
Abstract:
An organic light emitting display capable of improving display quality. The organic light emitting display includes a data driver for supplying bias power supply to data lines in a first period of one frame, for supplying reference power supply in a second period, and for supplying data signals in a fourth period, a scan driver for sequentially supplying scan signals to scan lines in the fourth period, pixels positioned at intersections of the scan lines and the data lines, and a first control line, a second control line, a third control line, and a fourth control line commonly coupled to the pixels. Each of the pixels includes a first capacitor for previously charging voltages corresponding to the data signals and a second capacitor charged by a voltage of the first capacitor in a third period between the second period and the fourth period.
Abstract:
A thin film transistor includes a substrate, a gate electrode on the substrate, an active layer spaced from the gate electrode, a source electrode and a drain electrode spaced from the gate electrode and coupled to the active layer, a gate wiring at a same layer as the gate electrode and coupled to the gate electrode, and first conductive members electrically coupled to, and overlapping, the gate wiring.
Abstract:
An organic light emitting diode display including a substrate, a scan line transferring a scan signal, a compensation control line transferring a compensation control signal, an operation control line applying an operation control signal, a data line and a driving voltage line transferring a data signal and a driving voltage, respectively, a switching thin film transistor (TFT) connected to the scan line and the data line, a compensation TFT and an initialization TFT connected to the compensation control line, an operation control TFT connected to the operation control line and the switching TFT, a driving TFT connected to the driving voltage line, an organic light emitting diode connected to a drain electrode of the driving TFT, and a hold capacitor connected between a source electrode of the operation control TFT and a gate electrode of the initialization TFT.
Abstract:
A scan driving unit and OLED display device including the unit are disclosed. In one aspect, the unit includes a first pre-decoder block that receives upper scan-line selection signals for selecting one of upper scan-lines that are arranged in an upper display region of a display panel, and outputs first logic signals based on the upper scan-line selection signals. It also includes a second pre-decoder block that receives lower scan-line selection signals for selecting one of lower scan-lines that are arranged in a lower display region of the display panel, and outputs second logic signals based on the lower scan-line selection signals. It further includes a first final-decoder block coupled between the upper display region and the first pre-decoder block that selects one of the upper scan-lines based on the first logic signals, and a second final-decoder block coupled between the lower display region and the second pre-decoder block that selects one of the lower scan-lines based on the second logic signals.