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公开(公告)号:US20200176546A1
公开(公告)日:2020-06-04
申请号:US16781009
申请日:2020-02-04
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA
Abstract: A multi-piece substrate integrally having a plurality of product regions each provided with a light-emitting element driven by a current and a blank region adjacent to each of the plurality of product regions is prepared. The current is passed through a cathode pad and an anode pad to inspect the light-emitting element. A plurality of display panels are cut out from the multi-piece substrate so as to respectively correspond to the plurality of product regions. The multi-piece substrate includes a plurality of first test pads disposed in each of the plurality of product regions for inspecting the light-emitting element, and a plurality of second test pads disposed in the blank region for inspecting the light-emitting element. The cathode pad and the anode pad are included in the plurality of first test pads and are not included in the plurality of second test pads.
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公开(公告)号:US20190139995A1
公开(公告)日:2019-05-09
申请号:US16234838
申请日:2018-12-28
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA , Hiroshi TABATAKE , Yasuhiro OGAWA
IPC: H01L27/12 , H01L29/786 , H01L27/13 , G02F1/1368 , H01L27/32
Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.
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公开(公告)号:US20190073951A1
公开(公告)日:2019-03-07
申请号:US16177513
申请日:2018-11-01
Applicant: Japan Display Inc.
Inventor: Yasuhiro OGAWA , Hiroshi TABATAKE , Hiroyuki KIMURA , Tetsuo MORITA , Makoto SHIBUSAWA
IPC: G09G3/3233 , H01L27/32 , G09G3/20 , G02F1/1362 , G09G3/3258 , G02F1/1343 , G02F1/136
Abstract: A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.
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公开(公告)号:US20180090068A1
公开(公告)日:2018-03-29
申请号:US15709661
申请日:2017-09-20
Applicant: Japan Display Inc.
Inventor: Yasuhiro OGAWA , Hiroshi TABATAKE , Hiroyuki KIMURA , Tetsuo MORITA , Makoto SHIBUSAWA
IPC: G09G3/3233 , G02F1/1343 , G09G3/3258 , G02F1/1362 , G09G3/20
CPC classification number: G09G3/3233 , G02F1/1343 , G02F1/1362 , G02F1/136213 , G02F1/13624 , G02F2001/13606 , G09G3/20 , G09G3/2003 , G09G3/2074 , G09G3/3258 , G09G2300/0426 , G09G2300/0439 , H01L27/3246
Abstract: A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.
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公开(公告)号:US20180053470A1
公开(公告)日:2018-02-22
申请号:US15618202
申请日:2017-06-09
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA , Hiroshi TABATAKE , Yasuhiro OGAWA
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G3/3233 , G09G2300/043 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2300/0866 , G09G2300/0871 , G09G2310/08
Abstract: A driving method of a display device is provided. In a first period, threshold voltages are simultaneously compensated for all first transistors which are provided in a plurality of pixels arranged in a matrix form with n rows and m columns. In a second period, turning switches are turned off, and image data is written to the first transistors in the plurality of pixels row-by-row. In a third period, all light-emitting elements are made to simultaneously emit light. n and m are each an integer larger than 1. Each of the first transistors is configured so that the image data is input to a control terminal, a first terminal is electrically connected to a power-source line, and a second terminal is electrically connected to the light-emitting element. The power-source line is supplied with a high-level potential in the first and third periods and a low-level potential in the second period.
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公开(公告)号:US20170213506A1
公开(公告)日:2017-07-27
申请号:US15367426
申请日:2016-12-02
Applicant: Japan Display Inc.
Inventor: Makoto SHIBUSAWA , Hiroyuki KIMURA , Tetsuo MORITA
IPC: G09G3/3258 , G09G3/3233
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0251 , G09G2310/0286 , G09G2310/08
Abstract: A display device including a light emitting element, a drive transistor connected to the light emitting element, a first switching element connected to the drive transistor and a main power supply line, a second switching element connected to the drive transistor and a reset power supply line, a third switching element connected to the drive transistor and a signal line, a fourth switching element connected to the third switching element and an initialization power supply line, and a capacitor element connected to the drive transistor and the third switching element, wherein two horizontal periods ON signal is supplied to a gate terminal of each of the second switching element, third switching element and fourth switching element respectively.
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公开(公告)号:US20160086543A1
公开(公告)日:2016-03-24
申请号:US14858348
申请日:2015-09-18
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA , Hiroshi NAKAYAMA , Hiroshi TABATAKE , Yutaka UMEDA
IPC: G09G3/32
CPC classification number: G09G3/3233 , G09G2300/0861 , G09G2310/0245 , G09G2330/021 , G09G2330/025 , G09G2330/026
Abstract: A flash phenomenon of OLEDs at the time of power source ON of a display device is suppressed. The OLED emits light when reference potentials VSS and VDD are applied from power source lines to the OLED's cathode and anode respectively. While the anode can be connected to one of the power source line via a driving TFT and a lighting switch, a reset potential VRS can be applied to the anode via a reset switch and the driving TFT. The lighting switch is turned OFF and the reset switch and the driving TFT are turned ON so that VRS is applied to the anode, before starting the application of the reference potentials to the power source lines. Following this state, the application of the reference potentials to the power source lines starts, and thus a normal operation of allowing the OLED to emit light starts.
Abstract translation: 抑制显示装置的电源ON时的OLED的闪光现象。 当参考电位VSS和VDD分别从电源线施加到OLED的阴极和阳极时,OLED发光。 当阳极可以经由驱动TFT和照明开关连接到电源线中的一个时,复位电位VRS可以经由复位开关和驱动TFT施加到阳极。 在开始向电源线施加参考电位之前,点亮开关被关闭并且复位开关和驱动TFT导通,使得VRS被施加到阳极。 在该状态之后,开始对电源线施加参考电位,因此开始允许OLED发光的正常操作。
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48.
公开(公告)号:US20150145902A1
公开(公告)日:2015-05-28
申请号:US14554614
申请日:2014-11-26
Applicant: Japan Display Inc.
Inventor: Hiroshi NAKAYAMA , Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA
IPC: G09G3/32
CPC classification number: G09G3/3266 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/066 , G09G2320/0233
Abstract: According to one embodiment, a display device includes a plurality of pixel units which each includes a light-emitting element and a pixel circuit, a plurality of first scan lines and second scan lines, a plurality of video signal lines, a controller which controls a scan line drive circuit and a signal line drive circuit, wherein the pixel circuit comprises an output switch, a drive transistor, a capacitance, and a pixel switch, wherein the controller controls a reset operation, a cancellation operation, a correction operation, and a light-emitting operation, and the controller deforms a waveform of a control signal which is supplied from the second scan line in a manner that a time of transitioning the pixel switch from an on-state to an off-state is longer than the time of transitioning by a non-deformed control signal, when writing the video voltage signal in the correction operation.
Abstract translation: 根据一个实施例,显示装置包括多个像素单元,每个像素单元包括发光元件和像素电路,多个第一扫描线和第二扫描线,多个视频信号线,控制器 扫描线驱动电路和信号线驱动电路,其中所述像素电路包括输出开关,驱动晶体管,电容和像素开关,其中所述控制器控制复位操作,取消操作,校正操作和 发光操作,并且控制器使从第二扫描线提供的控制信号的波形以使得像素开关从导通状态转换到截止状态的时间长于时间 当在校正操作中写入视频电压信号时,通过非变形控制信号转换。
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