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公开(公告)号:US20240290275A1
公开(公告)日:2024-08-29
申请号:US18245534
申请日:2022-05-31
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiangnan Lu , Zhenzhen Shan , Jianchao Zhu , Guangliang Shang , Xing Yao
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/08
Abstract: A scan circuit having a plurality of stages is provided. A respective stage includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit configured to receive a start signal or an output signal from a previous scan unit, a first processing subcircuit, a second processing subcircuit, and an output subcircuit. The output subcircuit includes a first output transistor. The input subcircuit includes a first input transistor and a second input transistor sequentially coupled between an input terminal and a first node. The first node is coupled to a gate electrode of the first output transistor. The first processing subcircuit includes a first switch transistor and a second switch transistor coupled between the first node and a first reference terminal. The first reference terminal is configured to receive a first reference signal.
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42.
公开(公告)号:US11210987B2
公开(公告)日:2021-12-28
申请号:US16985925
申请日:2020-08-05
Inventor: Hongfei Cheng , Xing Yao
Abstract: A shift register circuit and a driving method thereof, a gate driving circuit and a display panel are provided. The shift register circuit includes: an input terminal; a first reference voltage terminal; a second reference voltage terminal; a first clock signal terminal; a second clock signal terminal; an output terminal; an input circuit, a first control circuit; a second control circuit; a third control circuit; a compensation circuit, a first node, a second node, a third node and an output circuit, the compensation circuit is configured to compensate a voltage of at least one of the first node, the second node, and the third node in response to the second clock signal.
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43.
公开(公告)号:US10811114B2
公开(公告)日:2020-10-20
申请号:US16138878
申请日:2018-09-21
Applicant: BOE Technology Group Co., Ltd.
Inventor: Lijun Yuan , Mingfu Han , Seung Woo Han , Xing Yao , Zhichong Wang , Guangliang Shang , Haoliang Zheng
IPC: G11C19/00 , G11C19/28 , G09G3/3258 , G09G3/36
Abstract: Embodiments of the present application provide a shift register unit, a method for driving the same, a gate driving circuit, and a display apparatus. The shift register unit comprises at least two sub-circuits of a first output sub-circuit, a second output sub-circuit, and a third output sub-circuit. The first output sub-circuit is configured to output a voltage at a signal output terminal to a reset signal output terminal; the second output sub-circuit is configured to output the voltage at the signal output terminal to a gating signal output terminal; and the third output sub-circuit is configured to output a voltage at a second voltage terminal to a light-emitting control signal output terminal or is configured to output a voltage at a first voltage terminal to the light-emitting control signal output terminal.
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公开(公告)号:US10403228B2
公开(公告)日:2019-09-03
申请号:US14909661
申请日:2015-07-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing Yao , Yuanbo Zhang , Seungwoo Han
Abstract: A shift register unit includes: a discharging TFT, a source electrode and a drain electrode of which are connected to a first low level signal input end and a pull-up node respectively; and a first discharging control unit connected to a gate electrode of the discharging TFT and configured to output a first control signal to the gate electrode of the discharging TFT between a first and a second time points, so as to enable the discharging TFT to be in an on state and output a first low level signal to the pull-up node, thereby to discharge the pull-up node. The first time point is a time point when the processing of a first frame by the shift register is ended, and the second time point is a time point when the processing of a second frame adjacent to the first frame by the shift register is started.
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45.
公开(公告)号:US10217391B2
公开(公告)日:2019-02-26
申请号:US15541639
申请日:2016-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
IPC: G11C19/28 , G09G3/32 , G09G3/36 , G09G3/20 , G09G3/3266
Abstract: Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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公开(公告)号:US10204695B2
公开(公告)日:2019-02-12
申请号:US15520191
申请日:2016-11-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang Shang , Seungwoo Han , Mingfu Han , Haoliang Zheng , Xing Yao , Hyunsic Choi
Abstract: The present application discloses a control circuit for controlling a noise reduction thin film transistor in a shift register unit. The control circuit includes a timer for initiating a timing process when the shift register is turned on, to obtain an operating time of the shift register; a threshold voltage calculator coupled to the timer for calculating a present threshold voltage based on the operating time, a gate voltage of the noise reduction thin film transistor, and an initial threshold voltage of the noise reduction thin film transistor; and a gate voltage controller coupled to the threshold voltage calculator for adjusting the gate voltage of the noise reduction thin film transistor during the noise reduction phase, to control the noise reduction thin film transistor in an ON state during the noise reduction phase.
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公开(公告)号:US10192504B2
公开(公告)日:2019-01-29
申请号:US15501265
申请日:2016-07-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD
Inventor: Mingfu Han , Seungwoo Han , Guangliang Shang , Hyunsic Choi , Xing Yao , Haoliang Zheng , Xue Dong , Jungmok Jun , Yunsik Im
Abstract: The present disclosure provides a shift register, including: an input unit, an output control unit, a first pull-down unit, a second pull-down unit, a reset unit, and a pull-down control unit. The input unit comprises a control terminal connected to a signal input terminal, a first terminal connected to a first voltage terminal, and a second terminal connected to a first node. The output control unit comprises a control terminal connected to the first node, a first terminal connected to a first clock signal terminal, and a second terminal connected to a signal output terminal. The first pull-down unit comprises a control terminal connected to a second node, a first terminal connected to the first node, and a second terminal connected to a compensation signal terminal. The second pull-down unit comprises a control terminal connected to the compensation signal terminal, and a first terminal connected to the second node.
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公开(公告)号:US10115335B2
公开(公告)日:2018-10-30
申请号:US15502983
申请日:2016-05-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Haoliang Zheng , Seungwoo Han , Guangliang Shang , Hyunsic Choi , Mingfu Han , Xing Yao , Zhichong Wang , Lijun Yuan
Abstract: The present disclosure relates to a shift register unit and driving method thereof, a gate driving circuit and a display device. The shift register unit comprises: an input module for controlling a level of a first node based on a scan pulse, an output module for controlling a scan pulse output based on the level of the first node, a reset module for resetting the first node and the scan pulse output, and a control module for generating a reset trigger signal, wherein the reset module further resets the first node based on the reset trigger signal. The shift register units can be cascaded to form a gate driving circuit to realize output of multiple scan pulses. By integrating such a gate driving circuit on the array substrate, area of the bezel region of the array substrate can be reduced, thereby facilitating bezel narrowing of a display device. At the same time, due to presence of the control module, the reset module is enabled to reset the first node more stably while normal output of the scan pulse is maintained.
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49.
公开(公告)号:US20180204494A1
公开(公告)日:2018-07-19
申请号:US15541639
申请日:2016-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
CPC classification number: G09G3/20 , G09G3/3266 , G09G3/3677 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G11C19/28 , G11C19/287
Abstract: Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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公开(公告)号:US09793300B2
公开(公告)日:2017-10-17
申请号:US14900960
申请日:2015-06-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiaolin Wang , Xing Yao , Yoonsung Um , Seungwoo Han , Yunsik Im
IPC: H01L27/14 , H01L27/12 , H01L29/786 , H01L27/02 , H01L29/417 , H01L29/423
CPC classification number: H01L27/124 , H01L27/0207 , H01L27/1255 , H01L29/41733 , H01L29/42384 , H01L29/786 , H01L29/78606
Abstract: The present disclosure provides a TFT and a circuit structure to improve the characteristics of the threshold voltage drift of the TFT. The TFT includes a gate electrode, a semiconductor layer, an etch stop layer, and a source electrode and a drain electrode connected to the semiconductor layer. The TFT further includes a stopping structure arranged over the etch stop layer. The stopping structure is electrically isolated from the source electrode and the drain electrode, and an orthogonal projection of the stopping structure onto the etch stop layer at least partially overlaps an orthogonal projection of the semiconductor layer onto the etch stop layer. The present disclosure improves the characteristics of the threshold voltage drift of the TFT.
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