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公开(公告)号：US11347148B2
公开(公告)日：2022-05-31
申请号：US16086990
申请日：2018-02-12
Inventor： Wei Li , Bin Zhou , Jun Liu , Ning Liu , Yang Zhang , Yingbin Hu
Abstract: A patterning method and a method for manufacturing an array substrate are provided, and the patterning method includes: forming a photolithography auxiliary film and a positive photoresist film in turn on a base substrate provided with a layer to be patterned; subjecting the photolithography auxiliary film and the positive photoresist film to a photolithography process to form a photolithography auxiliary layer pattern and a positive photoresist pattern; patterning the layer to be patterned; and UV irradiating the photolithography auxiliary layer pattern and the positive photoresist pattern and then removing the photolithography auxiliary layer pattern and the positive photoresist pattern.
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42.发明申请公开(公告)号：US20210335848A1
公开(公告)日：2021-10-28
申请号：US16484414
申请日：2018-10-12
Inventor： Yang Zhang , Tongshang Su , Bin Zhou , Wei Li , Wei Song , Jun Liu
IPC: H01L27/12
Abstract: A substrate for an electronic device includes an insulating layer; a via extending into the insulating layer; a light shielding layer in the via; and a thin film transistor comprising an active layer on the light shielding layer and in the via. The light shielding layer is configured to shield light from irradiating on the active layer.
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公开(公告)号：US11114469B2
公开(公告)日：2021-09-07
申请号：US16396726
申请日：2019-04-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Bin Zhou , Binbin Cao , Liangchen Yan , Dongfang Wang , Ce Zhao , Luke Ding , Jun Liu
IPC: H01L27/12
Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
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公开(公告)号：US11069758B2
公开(公告)日：2021-07-20
申请号：US16436201
申请日：2019-06-10
Inventor： Wei Song , Liangchen Yan , Ce Zhao , Dongfang Wang , Bin Zhou , Yuankui Ding , Jun Liu , Yingbin Hu , Wei Li
Abstract: The present disclosure relates to the display technology, and provides an OLED display substrate, a method for manufacturing the OLED display substrate and a display device. The method includes: forming pixel definition layer transition patterns with metal; and oxidizing the pixel definition layer transition patterns to form an insulative pixel definition layer.
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公开(公告)号：US11069725B2
公开(公告)日：2021-07-20
申请号：US16399508
申请日：2019-04-30
IPC: H01L27/12 , H01L21/311 , H01L21/3213
Abstract: A display substrate and a method of preparing the same, and a display device are provided, the method including: providing a substrate; forming a switching thin film transistor precursor and a driving thin film transistor precursor on the substrate, each including a semiconductor layer, a gate insulating material layer and a gate metallic layer stacked sequentially above the substrate; forming a photoresist layer above the switching thin film transistor precursor and the driving thin film transistor precursor, and forming an etching mask from the photoresist layer, a first portion of the etching mask at the switching thin film transistor precursor and a second portion of the etching mask at the driving thin film transistor precursor having different shapes; and forming a switching thin film transistor and a driving thin film transistor, by etching processing the switching thin film transistor precursor and the driving thin film transistor precursor with the etching mask.
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Patent Agency Ranking
公开(公告)号：US20210124226A1
公开(公告)日：2021-04-29
申请号：US16964278
申请日：2019-12-13
Inventor： Leilei Cheng , Jingang Fang , Luke Ding , Jun Liu , Wei Li , Bin Zhou
IPC: G02F1/1362 , H01L21/768 , H01L23/532 , H01L27/12
Abstract: A method of manufacturing an array substrate is provided, which comprises: forming a first metal layer and an insulating layer in sequence on a base substrate, the insulating layer covering the first metal layer; forming an etch barrier layer on the insulating layer; etching the etching barrier layer and the insulating layer multiple times, wherein an effective blocking area of the etching barrier layer decreases successively in each etching to form a connection hole penetrating the insulating layer, the connection hole includes a plurality of via holes connected in sequence, and a slope angle of a hole wall of each via hole is smaller than a preset slope angle; and forming a second metal layer, the second metal layer being connected to the first metal layer through the connection hole.
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47.发明授权公开(公告)号：US10818798B2
公开(公告)日：2020-10-27
申请号：US16410823
申请日：2019-05-13
Inventor： Yingbin Hu , Ce Zhao , Yuankui Ding , Jun Wang , Jun Liu , Guangyao Li , Yongchao Huang , Wei Li , Liangchen Yan
IPC: H01L29/786 , H01L29/66 , H01L27/12
Abstract: A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.
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公开(公告)号：US20200273939A1
公开(公告)日：2020-08-27
申请号：US16665410
申请日：2019-10-28
Inventor： Haitao Wang , Qinghe Wang , Jun Wang , Guangyao Li , Yang Zhang , Jun Liu , Dongfang Wang
IPC: H01L27/32
Abstract: Disclosed are an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: an underlying substrate, and gate lines and data lines located on the underlying substrate, and intersecting with each other, a layer where the gate lines are located is between a layer where the data lines are located, and the underlying substrate; and the array substrate further includes a buffer layer located between the underlying substrate and the layer where the gate lines are located; and the buffer layer includes a plurality of through-holes, where orthographical projections of the through-holes onto the underlying substrate cover orthographical projections of the areas where the gate lines intersect with the data lines, onto the underlying substrate.
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49.发明申请公开(公告)号：US20200251596A1
公开(公告)日：2020-08-06
申请号：US16638283
申请日：2019-08-07
Inventor： Tongshang Su , Dongfang Wang , Jun Liu , Guangyao Li , Wei Li , Qinghe Wang , Chao Wang , Tao Sun
IPC: H01L29/786 , H01L27/12 , H01L29/417 , H01L29/66
Abstract: The disclosure relates to a thin film transistor. The thin film transistor may include a substrate, an active layer on the substrate, a gate on the active layer, and a source and a drain. The active layer may include a first conducting region, a second conducting region, and a channel region between the first conducting region and the second conducting region. An orthographic projection of the source and an orthographic projection of the drain on the substrate may cover at least an orthographic projection of a first conducting region and an orthographic projection of a second conducting region on the substrate.
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50.发明授权公开(公告)号：US10553801B2
公开(公告)日：2020-02-04
申请号：US15991134
申请日：2018-05-29
Inventor： Jun Wang , Guangyao Li , Dongfang Wang , Jun Liu , Guangcai Yuan , Leilei Cheng
Abstract: The present disclosure relates to a substrate, a method for fabricating the same and an organic light emitting diode display device. The substrate includes a metal foil. A metal material used for the metal foil is capable of being anodized and a plurality of concave light trapping microstructures is formed on a surface of the metal foil.
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