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公开(公告)号：US11538876B2
公开(公告)日：2022-12-27
申请号：US16673168
申请日：2019-11-04
Inventor： Binbin Cao
Abstract: The disclosure provides LED display panel and manufacturing method thereof. LED display panel includes: substrate; LED on substrate; pixel defining layer defining pixel opening on substrate, the LED being within pixel opening; and first encapsulation layer on light emitting side of LED. Portion of first encapsulation layer within pixel opening includes sidewall inclined with respect to substrate, surface of sidewall close to LED includes first portions and second portions alternately arranged in direction away from LED and connected to each other, and inclination angles of first portions with respect to substrate are smaller than those of second portions with respect to substrate. Refractive index of material of first encapsulation layer is greater than refractive index of material of each of layer structures directly on both sides of first encapsulation layer in direction perpendicular to substrate.
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2.发明授权公开(公告)号：US11245042B2
公开(公告)日：2022-02-08
申请号：US16770252
申请日：2019-11-07
Inventor： Binbin Cao
IPC: H01L29/786 , H01L29/66
Abstract: A thin film transistor (10) may include a substrate (100); a buffer layer (300) on a surface of the substrate (100); an active layer (400) on a surface of the buffer layer (300) opposite from the substrate (100); a gate insulating layer (500) on a surface of the active layer (400) opposite from the substrate (100), and a gate (600) on a surface of the gate insulating layer (500) opposite from the substrate (100). A width of the active layer (400) may be smaller than a width of the gate (600), and an orthographic projection of the gate (600) on the substrate (100) may cover an orthographic projection of the active layer (400) on the substrate (100).
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3.发明授权公开(公告)号：US11244965B2
公开(公告)日：2022-02-08
申请号：US16768232
申请日：2019-10-25
Inventor： Binbin Cao
IPC: H01L27/12 , H01L29/417 , H01L29/786
Abstract: A thin film transistor, comprising a substrate, an active layer disposed on the substrate, and a source and drain that make electrical contact with the active layer, wherein the source and drain each comprise a first sub-electrode and a second sub-electrode that are stacked along a thickness of the active layer, and the first sub-electrode is closer to the active layer relative to the second sub-electrode. An area of an overlapping region between an orthographic projection of the second sub-electrode of at least one of the source and drain on the substrate and an overlapping region between an orthographic projection of the first sub-electrode of the at least one of the source and the drain on the substrate and the orthographic projection of the active layer on the substrate.
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公开(公告)号：US11233155B2
公开(公告)日：2022-01-25
申请号：US16067366
申请日：2017-11-29
Inventor： Binbin Cao , Lin Sun , Chao Wang
IPC: H01L29/786 , H01L29/66
Abstract: A fabrication method of a thin film transistor is provided. The fabrication method includes: forming a gate electrode, an active layer, a drain electrode and a source electrode on the base substrate, in which the active layer includes a channel region and a second portion on both sides of the channel region, and at least a portion of the channel region is overlapped with the gate electrode; and performing a laser annealing process on a side of the base substrate by using a laser, in which the channel region is shielded without being irradiated by the laser, a resistivity of the second portion of the active layer is lower than a resistivity of the channel region, and the second portion of the active layer is connected with the source electrode and the drain electrode. A thin film transistor, an array substrate and a display device are further provided.
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公开(公告)号：US20210226065A1
公开(公告)日：2021-07-22
申请号：US16099506
申请日：2017-11-22
Inventor： Binbin Cao , Haijiao Qian , Chengshao Yang , Yinhu Huang
IPC: H01L29/786 , H01L29/66
Abstract: The present application discloses a thin film transistor having an active layer including a channel part, a source contact part, and a drain contact part. At least one of the source contact part and the drain contact part has a contacting edge having one or more irregularities along the contacting edge.
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Patent Agency Ranking
公开(公告)号：US10551709B2
公开(公告)日：2020-02-04
申请号：US15747694
申请日：2017-06-28
Inventor： Ke Cao , Chengshao Yang , Binbin Cao , Ling Han
IPC: H01L27/12 , G02F1/1368 , H01L29/423 , H01L29/786 , G02F1/1339 , G02F1/1335 , G02F1/1362 , G02F1/1333
Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposing substrate which are disposed opposite to each other; the array substrate includes a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; the opposing substrate includes a second base substrate and a gate electrode disposed on the second base substrate; the active layer includes a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located.
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公开(公告)号：US09791755B2
公开(公告)日：2017-10-17
申请号：US15130066
申请日：2016-04-15
Inventor： Binbin Cao , Yinhu Huang , Jongwon Moon
IPC: G02F1/1362 , H01L27/12 , H01L29/786
CPC classification number: G02F1/136209 , G02F1/136227 , G02F2001/136222 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1262 , H01L29/78633 , H01L29/7869
Abstract: The present disclosure provides a COA substrate, a display device and a method for manufacturing the COA substrate. The COA substrate includes: a passivation layer pattern arranged on a first conductive layer pattern including a data line, and a source electrode and a drain electrode of a TFT, and including a first via-hole at a position corresponding to the drain electrode; a second conductive layer pattern arranged on the passivation layer pattern and including a conductive connection pattern arranged at a region defined by a gate line, the data line and the TFT, and connected to the drain electrode of the TFT through the via-hole; and a color filter layer pattern arranged on the second conductive layer pattern and including a second via-hole at a position corresponding to the conductive connection pattern.
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公开(公告)号：US11177386B2
公开(公告)日：2021-11-16
申请号：US16099506
申请日：2017-11-22
Inventor： Binbin Cao , Haijiao Qian , Chengshao Yang , Yinhu Huang
IPC: H01L29/00 , H01L29/786 , H01L29/66
Abstract: The present application discloses a thin film transistor having an active layer including a channel part, a source contact part, and a drain contact part. At least one of the source contact part and the drain contact part has a contacting edge having one or more irregularities along the contacting edge.
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公开(公告)号：US11075230B2
公开(公告)日：2021-07-27
申请号：US16596212
申请日：2019-10-08
Inventor： Binbin Cao , Chengzhi Ye , Fangfang Li , Hui An , Hengbin Li
IPC: H01L27/12 , H01L29/49 , H01L29/786
Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor includes a first electrode on a substrate, a first insulating layer on the first electrode with the first insulating layer having a sidewall, an active layer on the first insulating layer with the active layer connected to the first electrode and comprising a portion on the sidewall which is configured as a channel of the thin film transistor, and a second electrode on the active layer with the second electrode connected to the active layer.
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公开(公告)号：US20210202537A1
公开(公告)日：2021-07-01
申请号：US16074976
申请日：2017-11-14
Inventor： Binbin Cao , Haijiao Qian , Chengshao Yang , Yinhu Huang
IPC: H01L27/12
Abstract: A manufacturing method of an array substrate, an array substrate and a display device are disclosed. The manufacturing method of the array substrate includes: providing a base substrate (200); forming a semiconductor layer on the base substrate; depositing an etch stop layer material on the semiconductor layer; subjecting the etch stop layer material to a wet etching process to form an etch stop layer; subjecting the semiconductor layer to a dry etching process to form an active layer, wherein the active layer includes a first region and a second region surrounding the first region, an orthographic projection of the etch stop layer on the base substrate completely coincides with an orthographic projection of the first region of the active layer on the base substrate.
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