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261 records (took 0.019 seconds)

    Maximum search circuit
    31.
    发明授权
    Maximum search circuit 失效
    最大搜索电路

    公开(公告)号：US5187675A

    公开(公告)日：1993-02-16

    申请号：US761380

    申请日：1991-09-18

    Applicant: Paul W. Dent ,  Jaap C. Haartsen

    Inventor： Paul W. Dent ,  Jaap C. Haartsen

    IPC: G06F7/02 ,  G06F7/22 ,  G06F7/38

    CPC classification number: G06F9/30021 ,  G06F7/026 ,  G06F7/22

    Abstract: An electronic comparator for selecting and outputting the larger of first and second electrical, binary-coded input values presented bit-serially, most-significant-bit first, has first and second input terminals; a logical exclusive-OR gate; a first resettable flip-flop; a second flip-flop; and a device for selecting one of the input values as an output of the comparator. In a second embodiment, the electronic comparator has first and second input terminals; a logical exclusive-OR gate; a first flip-flop synchronized with a train of bitclock pulses; a second resettable flip-flop; a third flip-flop; and a device for selecting one of the input values as an output of the comparator. Devices for generating traceback signals indicating which input values were selected and a signal indicating that the maximum value has been identified are also disclosed.

    Abstract translation: 电子比较器用于选择和输出第一和第二电子二进制编码的输入值中较大的第二和第二输入端，其中，第一和第二输入端有位串行，最高有效位。 逻辑异或门; 第一个可复位触发器; 第二个触发器 以及用于选择输入值之一作为比较器的输出的装置。 在第二实施例中，电子比较器具有第一和第二输入端; 逻辑异或门; 与一串比特时钟脉冲同步的第一个触发器; 第二可复位触发器; 第三个触发器 以及用于选择输入值之一作为比较器的输出的装置。 还公开了用于产生指示哪些输入值被选择的回溯信号的装置和指示已经识别出最大值的信号。

    Apparatus for recognizing relative extrema
    32.
    发明授权
    Apparatus for recognizing relative extrema 失效
    识别相对极值的装置

    公开(公告)号：US4757464A

    公开(公告)日：1988-07-12

    申请号：US874494

    申请日：1986-06-16

    Applicant: Werner Zimmermann ,  Karl-Heinz Hauser

    Inventor： Werner Zimmermann ,  Karl-Heinz Hauser

    IPC: G06F7/02 ,  G06F7/22 ,  H03M1/18 ,  H03K5/19 ,  G01R19/30

    CPC classification number: G06F9/30021 ,  G06F7/22

    Abstract: An apparatus for recognizing relative extrema in a dispersive digital data word sequence which includes relatively few, simple component elements specifically including a comparator which generates a positive or zero logic signal depending on the sign of the word comparison between two successive words, a counter operating within a limited numerical range for counting the comparator output signals upward or downward, and a threshold detector responding when a given counter status is exceeded or fallen short of for maximum or minimum indication, and which due to its structurally and operatively simple design ensures real-time processing of scattering data word sequences with a high word frequency, e.g., 500 MHz.

    Abstract translation: 一种用于识别分散数字数据字序列中的相对极值的装置，其包括相对较少的简单分量元素，其特别地包括一个比较器，该比较器根据两个连续字之间的字比较的符号产生正逻辑信号或零逻辑信号， 用于向上或向下计数比较器输出信号的有限的数值范围，以及当给定的计数器状态超过或低于最大或最小指示时的阈值检测器响应，以及由于其结构和操作简单的设计，确保实时 以高字数（例如500MHz）散射数据字序列的处理。

    Sorting apparatus
    33.
    发明授权
    Sorting apparatus 失效
    分拣装置

    公开(公告)号：US4584664A

    公开(公告)日：1986-04-22

    申请号：US542324

    申请日：1983-10-17

    Applicant: James L. Burrows

    Inventor： James L. Burrows

    IPC: G06F7/22 ,  G06F7/06

    CPC classification number: G06F7/22

    Abstract: Apparatus for sorting two input numbers including a memory that iteratively receives a digit from both of the numbers and transmits output signals corresponding to the input digits, the digits of the larger number being transmitted on one output line and the digits of the smaller number being transmitted onto another output line. The apparatus includes a memory that receives, as address signals, the state signal and signals corresponding to the input digits. The state signal determines the output lines onto which the next pair of input digits are to be transmitted.

    Abstract translation: 用于分类两个输入数字的装置，包括从两个数字迭代地接收数字的存储器，并且发送对应于输入数字的输出信号，在一个输出行上发送的较大数字的数字和正在发送的较小数字的数字 到另一条输出线。 该装置包括存储器，其接收作为地址信号的状态信号和对应于输入数字的信号。 状态信号确定要在其上传输下一对输入数字的输出线。

    Binary output processing in a digital computer using a time-sorted stack
    34.
    发明授权
    Binary output processing in a digital computer using a time-sorted stack 失效
    在数字计算机中使用时间排序的堆栈进行二进制输出处理

    公开(公告)号：US4279015A

    公开(公告)日：1981-07-14

    申请号：US048198

    申请日：1979-06-13

    Applicant: Brian S. Edelman ,  Ralph L. Robinson, Jr.

    Inventor： Brian S. Edelman ,  Ralph L. Robinson, Jr.

    IPC: G05B1/01 ,  F02D41/24 ,  G06F7/22 ,  G06F7/78 ,  G06F13/20 ,  G06F15/78 ,  G06F19/00 ,  G06F3/00

    CPC classification number: G06F7/78 ,  F02D41/28 ,  G06F13/20 ,  G06F7/22 ,  F02D2250/12

    Abstract: Improved processing of binary output data bytes and associated desired output times is provided. The binary output data and desired output times are placed in a self-sorting stack. Entries are time-ordered based on their respective desired output times. A real time counter is used in comparing the stack entries, one-by-one, with real time. The entry with the earliest desired output time, except in the case of an output interrupt, is compared before any other desired output time associated with a byte of output data. CPU control of the stack is not required and digital computer throughput is increased. Interruption of the CPU programming is avoided relative to transmission of outputs.

    Abstract translation: 提供二进制输出数据字节的改进处理和相关的期望输出时间。 二进制输出数据和所需的输出时间被放置在自动排序堆栈中。 条目根据各自所需的输出时间进行时间排序。 实时计数器用于逐一比较堆栈条目。 除了输出中断的情况下，最早期望的输出时间的条目在与输出数据字节相关联的任何其他期望的输出时间之前进行比较。 堆栈的CPU控制不是必需的，并且数字计算机的吞吐量增加。 相对于输出的传输，避免CPU编程的中断。

    Technique for ranking data observations
    35.
    发明授权
    Technique for ranking data observations 失效
    技术排名数据观察

    公开(公告)号：US3927391A

    公开(公告)日：1975-12-16

    申请号：US56196675

    申请日：1975-03-25

    Applicant: US NAVY

    Inventor： CANTRELL BEN H

    IPC: G06F7/22 ,  G06F17/18 ,  G06F7/02

    CPC classification number: G06F17/18 ,  G06F7/22

    Abstract: An improved technique for rapidly computing the real time rank of all data observations in a plurality of data sets. A plurality of n numbers, each representing a particular data observation, are sequentially entered into a plurality of serially connected storage registers. As each new observation is entered, it is compared with the previous observation to determine its magnitude relative to each other observation of the data set. The magnitudes, represented by a binary digit, are stored and synchronized by clock and delay circuitry to increment or decrement a value in a rank register for each of n data observations. After n data observations have been serially entered to form a data set, each serial entry of a new data observation forms a new data set which is automatically ranked using the redundancy information from the previously ranked data sets.

    Abstract translation: 一种用于快速计算多个数据集中所有数据观测的实时等级的改进技术。 每个表示特定数据观察的n个数字被顺序地输入到多个串行连接的存储寄存器中。 当进入每个新的观察时，将其与先前的观察值进行比较，以确定其相对于数据集的彼此观测的幅度。 由二进制数字表示的幅度由时钟和延迟电路存储和同步，以便为n个数据观测中的每一个增加或减少秩寄存器中的值。 在已经串行输入n个数据观察以形成数据集之后，新数据观察的每个串行条目形成使用来自先前排列的数据集的冗余信息自动排序的新数据集。

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