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公开(公告)号：US20230308323A1
公开(公告)日：2023-09-28
申请号：US17584099
申请日：2022-01-25
Applicant: Texas Instruments Incorporated
Inventor： Kumar Anurag Shrivastava , Siraj Akhtar , Swaminathan Sankaran , Anant Shankar Kamath
IPC: H04L27/04
CPC classification number: H04L27/04
Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.
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公开(公告)号：US11671138B2
公开(公告)日：2023-06-06
申请号：US17489483
申请日：2021-09-29
Applicant: Texas Instruments Incorporated
Inventor： RR Manikandan , Kumar Anurag Shrivastava , Robert Floyd Payne , Anant Shankar Kamath , Swaminathan Sankaran , Kishalay Datta , Siraj Akhtar , Mark Edward Wentroble , Suvadip Banerjee , Rakesh Hariharan , Gurumurti Kailaschandra Avhad
CPC classification number: H04B1/44 , H03K3/017 , H03K5/24 , H04L27/04 , H04L27/066
Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
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公开(公告)号：US10805123B2
公开(公告)日：2020-10-13
申请号：US15914753
申请日：2018-03-07
Applicant: Texas Instruments Incorporated
Inventor： Atul Singh , Kumar Anurag Shrivastava
IPC: H04L25/02 , G01R31/317 , H03D3/00 , G06F1/08
Abstract: A method of detecting crosstalk for a digital isolator having first and second channels including two die with channels including a transmit side, receive side, with ≥1 die including a capacitive barrier for each channel. A first clock signal at a first frequency in a first pulse pattern and a second clock signal at a second frequency in a second pulse pattern are configured, wherein the pulse patterns have a phase difference. The transmit side of the channels each encode their received clock pulse pattern, then modulate with a carrier frequency to provide a fc1 and a fc2 signal, respectively. The receive side of the channels demodulate received signals during a rising or falling edge of their clock signal to generate a delayed received version of the first and second clock pulse pattern. Missing pulses are identified by comparing the delayed received clock pulse patterns to their clock pulse patterns.
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34.发明申请公开(公告)号：US20200313945A1
公开(公告)日：2020-10-01
申请号：US16900010
申请日：2020-06-12
Applicant: Texas Instruments Incorporated
Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.
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Patent Agency Ranking
公开(公告)号：US10447202B2
公开(公告)日：2019-10-15
申请号：US15427856
申请日：2017-02-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: Apparatus for communication across a capacitively coupled channel are disclosed herein. An example circuit includes a first plate substantially parallel to a substrate, thereby forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.
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公开(公告)号：US20180226920A1
公开(公告)日：2018-08-09
申请号：US15427856
申请日：2017-02-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: Apparatus for communication across a capacitively coupled channel are disclosed herein. An example circuit includes a first plate substantially parallel to a substrate, thereby forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.
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公开(公告)号：US10014844B1
公开(公告)日：2018-07-03
申请号：US15395353
申请日：2016-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kumar Anurag Shrivastava , Subhashish Mukherjee , Madhulatha Bonu
Abstract: A circuit includes an amplifier having an input that receives an alternating current (AC) waveform and an output that is coupled to a power source via a bias resistor. A bulk acoustic wave (BAW) resonator is coupled in parallel to the bias resistor via the power source and the amplifier output. The BAW resonator and the amplifier output forms a band pass filter to filter the AC waveform received at the amplifier input and to provide a filtered AC waveform at the amplifier output.
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公开(公告)号：US09893916B2
公开(公告)日：2018-02-13
申请号：US15200706
申请日：2016-07-01
Applicant: Texas Instruments Incorporated
CPC classification number: H04L27/22 , H03D3/00 , H03K19/21 , H03L7/081 , H03L7/087 , H03L7/113 , H04L7/0087 , H04L7/0331 , H04L27/2271
Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase; when the data signal is oscillating at the first phase, output a first logic value; and when the data signal is oscillating at the second phase, output a second logic value, the output of the fast phase change detection circuit being used to determine whether the first output signal or the second output signal will be utilized in the feedback loop of the low bandwidth phase lock loop.
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公开(公告)号：US20160315670A1
公开(公告)日：2016-10-27
申请号：US15199611
申请日：2016-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subhashish Mukherjee , Anoop Bhat , Kumar Anurag Shrivastava
CPC classification number: H04B5/0087 , H04B5/0031 , H04L27/04
Abstract: In described examples, a method of inductive coupled communications includes providing a first resonant tank (first tank) and a second resonant tank (second tank) tuned to essentially the same resonant frequency, each having antenna coils and switches positioned for changing a Q and a bandwidth of their tank. The antenna coils are separated by a distance that provides near-field communications. The first tank is driven to for generating induced oscillations to transmit a predetermined number of carrier frequency cycles providing data. After the predetermined number of cycles, a switch is activated for widening the bandwidth of the first tank. Responsive to the oscillations in the first tank, the second tank begins induced oscillations. Upon detecting a bit associated with the induced oscillations, a switch is activated for widening the bandwidth of the second tank and a receiver circuit receiving an output of the second tank is reset.
Abstract translation: 在所描述的实例中，电感耦合通信的方法包括提供调谐到基本上相同谐振频率的第一谐振槽（第一箱）和第二谐振槽（第二箱），每个共振频率具有定位用于改变Q和A的天线线圈和开关 他们的坦克的带宽。 天线线圈分开一个提供近场通信的距离。 驱动第一坦克用于产生感应振荡以传送提供数据的预定数量的载波频率周期。 在预定数量的循环之后，启动开关以扩大第一箱的带宽。 响应于第一个罐中的振荡，第二个罐开始诱发振荡。 在检测到与感应振荡相关联的位时，启动开关用于加宽第二箱的带宽，并且接收接收第二箱的输出的接收器电路被复位。
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