公开(公告)号：US11929588B2

公开(公告)日：2024-03-12

申请号：US18185962

申请日：2023-03-17

Applicant: Silanna Asia Pte Ltd

Inventor： Joseph H. Colles ,  Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H01S5/026 ,  H01S5/042 ,  H01S5/068 ,  H01S5/40

CPC classification number: H01S5/0261 ,  H01S5/0428 ,  H01S5/06808 ,  H01S5/4025

Abstract: A pulsed laser diode driver includes an inductor having a first terminal configured to receive a source voltage. A source capacitor has a first terminal connected to the first terminal of the inductor to provide the source voltage. A bypass switch has a drain node connected to a second terminal of the inductor and to a first terminal of a bypass capacitor. A laser diode switch has a drain node connected to the second terminal of the inductor. A laser diode has an anode connected to a source node of the laser diode switch and a cathode connected to a bias voltage node. The laser diode switch and the bypass switch control a current flow through the inductor to produce a high-current pulse through the laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at the anode of the laser diode.

公开(公告)号：US20230318259A1

公开(公告)日：2023-10-05

申请号：US17661184

申请日：2022-04-28

Applicant: Silanna Asia Pte Ltd

Inventor： Joseph H. Colles ,  Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H01S5/042 ,  H03K17/687

CPC classification number: H01S5/0428 ,  H03K17/6871

Abstract: A pulsed laser diode driver includes multiple resonant laser diode driver cells, each cell including an inductor having a first inductor terminal to receive a source voltage, a source capacitor coupled between the first inductor terminal and ground, a bypass capacitor having a first terminal connected to the first inductor terminal and a second terminal connected to a second inductor terminal, a laser diode having a cathode that is connected to the first inductor terminal and an anode that is connected to the second inductor terminal, and a bypass switch connected between the second inductor terminal and ground. Each cell's bypass switch is configured to control a current flow through that cell's respective inductor to produce a high-current pulse through that cell's laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at the anode of that cell's laser diode.

公开(公告)号：US20220029541A1

公开(公告)日：2022-01-27

申请号：US16938294

申请日：2020-07-24

Applicant: Silanna Asia Pte Ltd

Inventor： Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H02M3/158 ,  H02M1/44

Abstract: A closed-loop switch-mode boost converter includes a switching signal generator circuit, a switch-mode boost amplifier, a filter circuit, and an error amplifier circuit. The switching signal generator circuit receives an input signal and outputs a switching signal. A duty-cycle of the switching signal has a first non-linear relationship to an amplitude of the input signal. The switch-mode boost amplifier receives the switching signal and produces an output signal. An amplitude of the output signal has a second non-linear relationship to the duty-cycle of the switching signal, and the output signal has a linear relationship to the input signal based on the first and second non-linear relationships. The filter circuit receives the output signal and outputs a filtered output signal. The error amplifier circuit receives the input signal and the filtered output signal and produces a feedback control signal. The filtered output signal is adjusted based on the feedback control signal.

公开(公告)号：US11038417B2

公开(公告)日：2021-06-15

申请号：US16990277

申请日：2020-08-11

Applicant: Silanna Asia Pte Ltd

Inventor： Joseph H. Colles ,  Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H02M3/07 ,  H03K17/687 ,  H02M1/088 ,  H02M1/00

Abstract: A charge pump having only NMOS devices charges a plurality of capacitors to a parallel charged voltage level by electrically connecting the capacitors in parallel between an input voltage node and a ground by activating a plurality of first NMOS transistor switches and a plurality of second NMOS transistor switches and deactivating a plurality of third NMOS transistor switches. The charge pump then generates a series capacitor output voltage level at a capacitor series output node by electrically connecting and discharging the capacitors in series between the input voltage node and the capacitor series output node by activating the third NMOS transistor switches and deactivating the first NMOS transistor switches and the second NMOS transistor switches.

公开(公告)号：US20190157446A1

公开(公告)日：2019-05-23

申请号：US16252168

申请日：2019-01-18

Applicant: Silanna Asia Pte Ltd

Inventor： Shanghui Larry Tu ,  Michael A. Stuber ,  Befruz Tasbas ,  Stuart B. Molin ,  Raymond Jiang

IPC: H01L29/786 ,  H01L29/66 ,  H01L23/00 ,  H01L29/10 ,  H01L27/12 ,  H01L29/06 ,  H01L21/84 ,  H01L29/78 ,  H01L23/495 ,  H01L21/768 ,  H01L21/74 ,  H01L23/535 ,  H01L23/522 ,  H01L29/417 ,  H01L25/00 ,  H01L21/48 ,  H01L23/48

Abstract: A semiconductor package includes a leadframe, having perimeter package leads and a ground voltage lead, a bottom semiconductor die flip-chip mounted to the leadframe, and a top semiconductor die. The bottom semiconductor die has a first frontside active layer with first frontside electrical contacts electrically connected to the leadframe, a first backside portion, and a buried oxide layer situated between the first frontside active layer and the first backside portion. The top semiconductor die is mounted to the first backside portion. The first frontside active layer includes a circuit electrically connected to the first backside portion by a backside electrical connection through the buried oxide layer. The first backside portion of the bottom semiconductor die is electrically connected to the ground voltage lead through a first electrical contact of the first frontside electrical contacts to minimize crosstalk.

公开(公告)号：US10135339B1

公开(公告)日：2018-11-20

申请号：US15879284

申请日：2018-01-24

Applicant: Silanna Asia Pte Ltd

Inventor： Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H02M3/155 ,  H02M3/158 ,  H03F3/185 ,  H03F3/193 ,  H02M3/156 ,  H03F3/21

Abstract: An open-loop switch-mode boost converter includes a switching signal generator circuit that receives a time-varying input signal and outputs a switching signal. A duty-cycle of the switching signal has a first non-linear relationship to an amplitude of the time-varying input signal. An amplifier receives the switching signal and outputs a time-varying output signal, an amplitude of which has a second non-linear relationship to the duty-cycle of the switching signal. The time-varying output signal has a linear relationship to the time-varying input signal based on the first non-linear relationship and the second non-linear relationship. A filter circuit receives the time-varying output signal and outputs a filtered time-varying output signal which has a maximum frequency component that is substantially the same as a maximum frequency component of the time-varying input signal. The switching signal generator circuit is communicatively isolated from the voltage output node and the filter output node.

公开(公告)号：US10128170B2

公开(公告)日：2018-11-13

申请号：US15402099

申请日：2017-01-09

Applicant: Silanna Asia Pte Ltd

Inventor： Stuart B. Molin ,  Laxminarayan Sharma

IPC: H01L23/495 ,  H01L21/48

Abstract: Conductive clip connection arrangements for semiconductor packages are disclosed. Some examples provide electrically conductive clip connection arrangements for semiconductor packages that improve electrical performance and fabrication reliability while maintaining compatibility with existing quality control processes. Some examples provide innovative conductive clip structures and die pad arrangements that broaden the range of options available for tailoring the physical configurations of one or more of the constituent conductive clips and/or die pads to achieve specific electrical performance targets.

公开(公告)号：US12100740B2

公开(公告)日：2024-09-24

申请号：US18350941

申请日：2023-07-12

Applicant: Silanna Asia Pte Ltd

Inventor： Stuart B. Molin ,  George Imthurn ,  James Douglas Ballard ,  Yashodhan Vijay Moghe

IPC: H01L29/78 ,  G01R19/00 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/402 ,  G01R19/0092 ,  H01L29/404 ,  H01L29/407 ,  H01L29/66613 ,  H01L29/66674 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7817 ,  H01L29/7823 ,  H01L29/7824 ,  H01L29/7826 ,  H01L29/7835

Abstract: An apparatus includes a first lateral diffusion field effect transistor (LDFET) having a first threshold voltage and that includes a first gate electrode, a first drain contact, a first source contact, and a first electrically conductive shield plate separated from the first gate electrode and the first source contact by a first interlayer dielectric. A second LDFET of the apparatus has a second threshold voltage and includes a second gate electrode, a second drain contact, and a second source contact. The second source contact is electrically connected to the first source contact of the first LDFET. A control circuit of the apparatus is electrically coupled to the first electrically conductive shield plate and is configured to apply to the first electrically conductive shield plate a first gate bias voltage of a first level to set the first threshold voltage of the first LDFET to a first desired threshold voltage.

公开(公告)号：US20240113502A1

公开(公告)日：2024-04-04

申请号：US17937625

申请日：2022-10-03

Applicant: Silanna Asia Pte Ltd

Inventor： Joseph H. Colles ,  Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H01S5/042 ,  H01S5/026 ,  H01S5/062 ,  H01S5/068 ,  H01S5/40

CPC classification number: H01S5/0428 ,  H01S5/0261 ,  H01S5/06216 ,  H01S5/06808 ,  H01S5/06825 ,  H01S5/4025

Abstract: A pulsed laser diode driver includes a source capacitor that receives a refresh current at a first terminal and develops a source voltage therefrom. A first terminal of an inductor is connected to the first terminal of the source capacitor. A second terminal of the inductor is connected to an anode of a laser diode and a bypass capacitor. One or more switches are configured to control a current flow through the inductor. A timing and control circuit is configured to receive the source voltage and to generate one or more gate driver signals to control the switches to produce a high-current pulse through the laser diode. The high-current pulse corresponds to a peak current of a resonant waveform developed at the anode of the laser diode. A timing of the one or more gate driver signals is based on a voltage level of the source voltage.

公开(公告)号：US20240047940A1

公开(公告)日：2024-02-08

申请号：US18360215

申请日：2023-07-27

Applicant: Silanna Asia Pte Ltd

Inventor： Joseph H. Colles ,  Steven E. Rosenbaum ,  Stuart B. Molin

IPC: H01S5/042

CPC classification number: H01S5/0428 ,  H01S5/0425

Abstract: A pulsed laser diode driver includes a laser diode switch and a bypass switch to control a current flow through an inductor to produce a high-current pulse through a laser diode, the high-current pulse corresponding to a peak current of a resonant waveform developed at an anode of the laser diode. A current pulse measurement circuit receives a sense voltage developed at a sense resistance and generates, based on the sense voltage, a current sense signal that corresponds to the peak current amplitude of the high-current pulse through the laser diode.