DISPLAY APPARATUS AND ASSEMBLY METHOD THEREOF

    公开(公告)号:US20210199233A1

    公开(公告)日:2021-07-01

    申请号:US17132197

    申请日:2020-12-23

    Abstract: Disclosed is a display apparatus including a display including a stand mounting part, a stand to which the stand mounting part is coupleable to mount the display on the stand, and a protection member comprising a portion that includes a support protection member and is detachably coupleable along an edge of the display so that, when the portion is coupled along the edge of the display, the support protection member covers a lower end portion of the display, and a mounting part protection member that is detachably coupleable along the edge of the display so that, when the mounting part protection member is coupled along the edge of the display, the mounting part protection member covers a portion of the display along which the stand is mountable, wherein the mounting part protection member is separately detachable from along the edge of the display while the portion that includes the support protection member remains coupled along the edge of the display with the support protection member covering the lower end portion of the display, to thereby uncover the portion of the display along which the stand is mountable.

    SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME
    34.
    发明申请
    SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD OF FABRICATING THE SAME 有权
    具有盖式结构的半导体器件及其制造方法

    公开(公告)号:US20160240619A1

    公开(公告)日:2016-08-18

    申请号:US15011820

    申请日:2016-02-01

    CPC classification number: H01L29/402 H01L27/088 H01L27/10876 H01L29/42392

    Abstract: A semiconductor device may include a device isolation region configured to define an active region in a substrate, an active gate structure disposed in the active region, and a field gate structure disposed in the device isolation region. The field gate structure may include a gate conductive layer. The active gate structure may include an upper active gate structure including a gate conductive layer and a lower active gate structure formed under the upper active gate structure and vertically spaced apart from the upper active gate structure. The lower active gate structure may include a gate conductive layer. A top surface of the gate conductive layer of the field gate structure is located at a lower level than a bottom surface of the gate conductive layer of the upper active gate structure.

    Abstract translation: 半导体器件可以包括被配置为在衬底中限定有源区的器件隔离区,设置在有源区中的有源栅极结构以及设置在器件隔离区中的场栅结构。 场栅结构可以包括栅极导电层。 有源栅极结构可以包括上有源栅极结构,其包括形成在上有源栅极结构下方并与上有源栅极结构垂直间隔开的栅极导电层和下有源栅极结构。 下部有源栅极结构可以包括栅极导电层。 场栅结构的栅极导电层的顶表面位于比上有源栅极结构的栅极导电层的底表面更低的水平处。

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