Abstract:
A tiled display device includes an array of a plurality of display panels. Each of the plurality of display panels includes a plurality of pixels constituting a plurality of pixel rows and a plurality of pixel columns, a data distributor disposed between a first pixel of a first pixel row among the plurality of pixel rows and a second pixel of the first pixel row adjacent to the first pixel in a first direction, and a scan driver disposed between the second pixel and a third pixel adjacent to the second pixel in the first direction.
Abstract:
A display device having a frame period including reset, compensation, relay, emission, and initialization periods. Each pixel includes: an organic light emitting diode having an anode coupled to a second node and a electrode coupled to a second power source; a first transistor between a first power source and the second node, and a gate electrode coupled to a first node; a second transistor between the first node and the second node; a third transistor between the first power source and a third node; a fourth transistor between a fourth node and the third node; a fifth transistor between a data line and the fourth node; a sixth transistor between a third power source and the second node; a first capacitor between the third node and the first node; and a second capacitor coupled the fourth node and the third power source.
Abstract:
A stage circuit includes an output part configured to supply a carry signal to a first output terminal and a scan signal to a second output terminal, in response to a voltage of a first node, a voltage of a second node, and a first clock signal being supplied to a first input terminal, a controller configured to control the voltage of the second node in response to the first clock signal being supplied to the first input terminal, a pull-up part configured to control the voltage of the first node in response to a carry signal of a previous stage being supplied to a second input terminal, and a pull-down part configured to control the voltage of the first node in response to the voltage of the second node and the carry signal of a next stage being supplied to a third input terminal.
Abstract:
A display device includes: a first substrate including a touch region for sensing a touch and a peripheral area surrounding the touch region; a second substrate facing the first substrate; thin film transistors positioned on the first substrate; pixel electrodes connected to the thin film transistors; common electrodes arranged to transmit a common voltage; sensing wires connected to the common electrodes and arranged to transmit a detection signal for sensing a touch; and a transparent electrode layer positioned on a first surface of the second substrate, the transparent electrode layer having a portion overlapping the peripheral area, and having at least one opening positioned over the touch region.
Abstract:
A demultiplexer includes: a first transistor connected between a data input terminal and a first output terminal; a second transistor connected between the data input terminal and a second output terminal; and a first pre-charge circuit connected to a gate electrode of the first transistor, the first pre-charge circuit including: a third transistor and a first diode connected between a first clock input terminal and the gate electrode of the first transistor in parallel; and a first capacitor connected between a second clock input terminal and the gate electrode of the first transistor.
Abstract:
A gate driver includes a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first input transistor and a second input transistor, where an output terminal of the first input transistor and an input terminal of the second input transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the first input terminal and the second node.
Abstract:
A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.
Abstract:
A display device includes: a first switching element which transmits a first data voltage; a second switching element which transmits a second data voltage; a driving transistor connected to the first switching element and the second switching element, where the driving transistor is driven based on the first data voltage and the second data voltage; and an organic light emitting diode connected to the driving transistor, where the organic light emitting diode emits light based on an output of the driving transistor, and a driving method thereof.
Abstract:
A display panel includes a display area including a plurality of pixels, and a peripheral area defining a non-display area. The display area includes a first light blocking member including a plurality of first openings, and the peripheral area includes a second light blocking member including a plurality of second openings.
Abstract:
A display device includes a substrate and pixels. The substrate includes: a display area including pixel areas, each including a first area and a second area; and a non-display area enclosing at least one side of the display area. The pixels are disposed on the pixel areas, each pixel including light emitting elements. Each pixel further includes: a pixel circuit part disposed on the first area and including at least one transistor and at least one capacitor; and a display element part disposed on the second area and including an emission area to emit light. Each of the pixel circuit part and the display element part has a multi-layer structure including one or more conductive layers and one or more insulating layers. At least one layer of the pixel circuit part and at least one layer of the display element part are disposed in a same layer.